Commit graph

11833 commits

Author SHA1 Message Date
Vincent Knecht
64323952aa arm64: dts: qcom: msm8916-alcatel-idol347: add GPIO torch LED
Add support for torch LED on GPIO 32.

Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104132400.1763218-3-vincent.knecht@mailoo.org
2022-11-06 21:11:10 -06:00
Dmitry Torokhov
b8f298d4f6 arm64: dts: qcom: sc7280: fix codec reset line polarity for CRD 1.0/2.0
The driver for the codec, when resetting the chip, first drives the line
low, and then high. This means that the line is active low. Change the
annotation in the DTS accordingly.

Fixes: f8b4eb64f2 ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 1.0/2.0 and IDP boards")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-5-dmitry.torokhov@gmail.com
2022-11-06 21:11:10 -06:00
Dmitry Torokhov
1caf66104c arm64: dts: qcom: sc7280: fix codec reset line polarity for CRD 3.0/3.1
The driver for the codec, when resetting the chip, first drives the line
low, and then high. This means that the line is active low. Change the
annotation in the DTS accordingly.

Fixes: 0a3a56a93f ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 3.0/3.1")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-4-dmitry.torokhov@gmail.com
2022-11-06 21:11:10 -06:00
Dmitry Torokhov
15d9fcbb3e arm64: dts: qcom: sm8250-mtp: fix reset line polarity
The driver for the codec, when resetting the chip, first drives the line
low, and then high. This means that the line is active low. Change the
annotation in the DTS accordingly.

Fixes: 36c9d012f1 ("arm64: dts: qcom: use GPIO flags for tlmm")
Fixes: 5a263cf629 ("arm64: dts: qcom: sm8250-mtp: Add wcd9380 audio codec node")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-3-dmitry.torokhov@gmail.com
2022-11-06 21:11:10 -06:00
Dmitry Torokhov
76d21ffc5d arm64: dts: qcom: msm8996: fix sound card reset line polarity
When resetting the block, the reset line is being driven low and then
high, which means that the line in DTS should be annotated as "active
low". It will become important when wcd9335 driver will be converted
to gpiod API that respects declared line polarities.

Fixes: f3eb39a55a ("arm64: dts: db820c: Add sound card support")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-1-dmitry.torokhov@gmail.com
2022-11-06 21:11:10 -06:00
Krzysztof Kozlowski
4a5923fe4e arm64: dts: qcom: sm8450-qrd: add SDHCI for microSD
Based on downstream DTS, it seems that SM8450 QRD has microSD card slot.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026200357.391635-5-krzysztof.kozlowski@linaro.org
2022-11-06 21:11:10 -06:00
Krzysztof Kozlowski
1f52331285 arm64: dts: qcom: sm8450-hdk: add SDHCI for microSD
The HDK8450 has microSD card slot.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026200357.391635-4-krzysztof.kozlowski@linaro.org
2022-11-06 21:11:10 -06:00
Krzysztof Kozlowski
9d561dc4e5 arm64: dts: qcom: sm8450: disable SDHCI SDR104/SDR50 on all boards
SDHCI on SM8450 HDK also has problems with SDR104/SDR50:

  mmc0: card never left busy state
  mmc0: error -110 whilst initialising SD card

so I think it is safe to assume this issue affects all SM8450 boards.
Move the quirk disallowing these modes to the SoC DTSI, to spare people
working on other boards the misery of debugging this issue.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026200357.391635-3-krzysztof.kozlowski@linaro.org
2022-11-06 21:11:10 -06:00
Krzysztof Kozlowski
a0646262ec arm64: dts: qcom: sm8450: move SDHCI pin configuration to DTSI
The SDHCI pin configuration/mux nodes are actually common to all
upstreamed boards, so define them in SoC DTSI to reduce code
duplication.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026200357.391635-2-krzysztof.kozlowski@linaro.org
2022-11-06 21:11:10 -06:00
Johan Hovold
7af949211a arm64: dts: qcom: sm8450: fix UFS PHY registers
The sizes of the UFS PHY register regions are too small and does
specifically not cover all registers used by the Linux driver.

As Linux maps these regions as full pages this is currently not an issue
on Linux, but let's update the sizes to match the vendor driver.

Fixes: 07fa917a33 ("arm64: dts: qcom: sm8450: add ufs nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024091507.20342-5-johan+linaro@kernel.org
2022-11-06 21:11:10 -06:00
Johan Hovold
b3c7839b69 arm64: dts: qcom: sm8350: fix UFS PHY registers
The sizes of the UFS PHY register regions are too small and does
specifically not cover all registers used by the Linux driver.

As Linux maps these regions as full pages this is currently not an issue
on Linux, but let's update the sizes to match the vendor driver.

Fixes: 59c7cf8147 ("arm64: dts: qcom: sm8350: Add UFS nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024091507.20342-4-johan+linaro@kernel.org
2022-11-06 21:11:10 -06:00
Johan Hovold
7f8b37dd4e arm64: dts: qcom: sm8250: fix UFS PHY registers
The sizes of the UFS PHY register regions are too small and does
specifically not cover all registers used by the Linux driver.

As Linux maps these regions as full pages this is currently not an issue
on Linux, but let's update the sizes to match the vendor driver.

Fixes: b7e2fba066 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024091507.20342-3-johan+linaro@kernel.org
2022-11-06 21:11:10 -06:00
Johan Hovold
36a31b3a8d arm64: dts: qcom: sm8150: fix UFS PHY registers
The sizes of the UFS PHY register regions are too small and does
specifically not cover all registers used by the Linux driver.

As Linux maps these regions as full pages this is currently not an issue
on Linux, but let's update the sizes to match the vendor driver.

Fixes: 3834a2e922 ("arm64: dts: qcom: sm8150: Add ufs nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024091507.20342-2-johan+linaro@kernel.org
2022-11-06 21:11:10 -06:00
Krzysztof Kozlowski
8b276ca036 arm64: dts: qcom: msm8916: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024002356.28261-2-krzysztof.kozlowski@linaro.org
2022-11-06 21:11:10 -06:00
Harry Austen
5a134c940c arm64: dts: qcom: msm8996: add support for oneplus3(t)
Add initial support for OnePlus 3 and 3T mobile phones. They are based
on the MSM8996 SoC.

Co-developed-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Harry Austen <hpausten@protonmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221023204505.115141-5-hpausten@protonmail.com
2022-11-06 21:11:10 -06:00
Harry Austen
18c32de673 arm64: dts: qcom: msm8996: add blsp1_i2c6 node
Add support for the sixth I2C interface on the MSM8996 SoC.

Signed-off-by: Harry Austen <hpausten@protonmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221023204505.115141-3-hpausten@protonmail.com
2022-11-06 21:11:02 -06:00
Harry Austen
1a94ba5b44 arm64: dts: qcom: msm8996: standardize blsp indexing
Use one-based indexing throughout the file for BLSP devices to avoid
confusion. Most of the node names and labels are consistent already.
This patch just fixes a few pinconf node names to match the one-based
indexing used in the label names.

Signed-off-by: Harry Austen <hpausten@protonmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221023204505.115141-2-hpausten@protonmail.com
2022-11-05 23:05:47 -05:00
Krzysztof Kozlowski
169e1553ac arm64: dts: qcom: msm8996: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221020225309.32116-2-krzysztof.kozlowski@linaro.org
2022-11-05 22:34:56 -05:00
Krzysztof Kozlowski
5ecbf096e0 arm64: dts: qcom: msm8996-sony-xperia-tone: drop incorrect wlan pin input
Pin configuration has no "input-high" property, so drop it from node
described as Wifi host wake up pin.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221020225309.32116-1-krzysztof.kozlowski@linaro.org
2022-11-05 22:34:56 -05:00
Krzysztof Kozlowski
2f0300a694 arm64: dts: qcom: sc7180: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.

Merge subnodes named 'pinconf' and 'pinmux' into one entry, add function
where missing (required by bindings for GPIOs) and reorganize overriding
pins by boards.

Split the SPI and UART configuration into separate nodes
1. SPI (MOSI, MISO, SCLK), SPI chip-select, SPI chip-select via GPIO,
2. UART per each pin: TX, RX and optional CTS/RTS.

This allows each board to customize them easily without adding any new
nodes.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221020225135.31750-4-krzysztof.kozlowski@linaro.org
2022-11-05 22:34:17 -05:00
Krzysztof Kozlowski
8ddfa04de4 arm64: dts: qcom: sc7180: revert "arm64: dts: qcom: sc7180: Avoid glitching SPI CS at bootup on trogdor"
This reverts commit e440e30e26 because it
is not a reliable way of fixing SPI CS glitch and it depends on specific
Linux kernel pin controller driver behavior.

This behavior of kernel driver was changed in commit b991f8c362
("pinctrl: core: Handling pinmux and pinconf separately") thus
effectively the DTS fix stopped being effective.

Proper solution for the glitching SPI chip select must be implemented in
the drivers, not via ordering of entries in DTS, and is already
introduced in commit d21f4b7ffc ("pinctrl: qcom: Avoid glitching lines
when we first mux to output").

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221020225135.31750-3-krzysztof.kozlowski@linaro.org
2022-11-05 22:34:17 -05:00
Krzysztof Kozlowski
59e787935c arm64: dts: qcom: sc7180-trogdor-homestar: fully configure secondary I2S pins
The Trogdor Homestar DTSI adds additional GPIO52 pin to secondary I2S pins
("sec_mi2s_active") and configures it to "mi2s_1" function.

The Trogdor DTSI (which is included by Homestar) configures drive
strength and bias for all "sec_mi2s_active" pins, thus the intention was
to apply this configuration also to GPIO52 on Homestar.

Reported-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Fixes: be0416a3f9 ("arm64: dts: qcom: Add sc7180-trogdor-homestar")
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221020225135.31750-2-krzysztof.kozlowski@linaro.org
2022-11-05 22:34:17 -05:00
Krzysztof Kozlowski
19e6789450 arm64: dts: qcom: sm8450: Add GPI DMA compatible fallback
Use SM6350 as fallback for GPI DMA, to indicate devices are compatible
and that drivers can bind with only one compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221018230352.1238479-6-krzysztof.kozlowski@linaro.org
2022-11-05 22:32:16 -05:00
Krzysztof Kozlowski
b561e225de arm64: dts: qcom: sm8350: Add GPI DMA compatible fallback
Use SM6350 as fallback for GPI DMA, to indicate devices are compatible
and that drivers can bind with only one compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221018230352.1238479-5-krzysztof.kozlowski@linaro.org
2022-11-05 22:32:16 -05:00
Krzysztof Kozlowski
e9f2053b78 arm64: dts: qcom: sc7280: Add GPI DMA compatible fallback
Use SM6350 as fallback for GPI DMA, to indicate devices are compatible
and that drivers can bind with only one compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221018230352.1238479-4-krzysztof.kozlowski@linaro.org
2022-11-05 22:32:16 -05:00
Jami Kettunen
aac16a9d24 arm64: dts: qcom: msm8998-oneplus-common: enable RRADC
Enable the Round Robin ADC for the OnePlus 5/5T.

Signed-off-by: Jami Kettunen <jami.kettunen@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016180330.1912214-6-caleb.connolly@linaro.org
2022-11-05 22:27:11 -05:00
Caleb Connolly
53c54069d9 arm64: dts: qcom: sdm845-xiaomi-beryllium: enable rradc
Enable the PMI8998 RRADC.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016180330.1912214-5-caleb.connolly@linaro.org
2022-11-05 22:27:11 -05:00
Caleb Connolly
e779eb9985 arm64: dts: qcom: sdm845-db845c: enable rradc
Enable the Round Robin ADC for the db845c.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016180330.1912214-4-caleb.connolly@linaro.org
2022-11-05 22:26:30 -05:00
Caleb Connolly
868985181a arm64: dts: qcom: sdm845-oneplus: enable rradc
Enable the RRADC for the OnePlus 6.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016180330.1912214-3-caleb.connolly@linaro.org
2022-11-05 22:26:11 -05:00
Caleb Connolly
1cb78978d3 arm64: dts: qcom: pmi8998: add rradc node
Add a DT node for the Round Robin ADC found in the PMI8998 PMIC.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016180330.1912214-2-caleb.connolly@linaro.org
2022-11-05 22:26:11 -05:00
Dzmitry Sankouski
d711b22eee arm64: dts: qcom: starqltechn: add initial device tree for starqltechn
New device support - Samsung S9 (SM-G9600) phone
What works:
- simple framebuffer
- storage (both main and sdcard)
- ramoops

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221012185411.1282838-3-dsankouski@gmail.com
2022-11-05 22:23:51 -05:00
Krzysztof Kozlowski
031f5436c9 arm64: dts: qcom: sm8250: align LPASS pin configuration with DT schema
DT schema expects LPASS pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-5-krzysztof.kozlowski@linaro.org
2022-11-05 21:49:16 -05:00
Krzysztof Kozlowski
195a0a11d6 arm64: dts: qcom: sm8250: correct LPASS pin pull down
The pull-down property is actually bias-pull-down.

Fixes: 3160c1b894 ("arm64: dts: qcom: sm8250: add lpass lpi pin controller node")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-4-krzysztof.kozlowski@linaro.org
2022-11-05 21:49:16 -05:00
Krzysztof Kozlowski
886a50bd03 arm64: dts: qcom: sc7280: align LPASS pin configuration with DT schema
DT schema expects LPASS pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-3-krzysztof.kozlowski@linaro.org
2022-11-05 21:49:16 -05:00
Krzysztof Kozlowski
67cb6e988f arm64: dts: qcom: sc7280: drop clock-cells from LPASS TLMM
The LPASS pin-controller is not a clock provider:

  qcom/sc7280-herobrine-herobrine-r1.dtb: pinctrl@33c0000: '#clock-cells' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220927153429.55365-2-krzysztof.kozlowski@linaro.org
2022-11-05 21:49:16 -05:00
Marijn Suijten
4ba146dd88 arm64: dts: qcom: sm6125-seine: Configure additional trinket thermistors
In addition to PMIC-specific (pm6125) thermistors downstream extends
this set with the rf-pa0/rf-pa1, quiet, camera-flash and UFS/eMMC
thermistors in sm6125 (trinket) board and seine-specific DT files.  All
thermistors report sensible temperature readings in userspace.

The sensors are also added to their respective Thermal Monitor node,
with thermal zones to match where applicable: emmc-ufs and camera-flash
are not available on the TM5 block, hence cannot be configured with a
tripping point and will not have a thermal zone.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220926190148.283805-6-marijn.suijten@somainline.org
2022-11-05 21:47:03 -05:00
Marijn Suijten
7401035f2e arm64: dts: qcom: sm6125-seine: Include PM6125 and configure PON
The Sony Xperia Seine board uses the PM6125; include it and configure
the PON buttons that provide the power and volume-up key.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220926190148.283805-5-marijn.suijten@somainline.org
2022-11-05 21:47:03 -05:00
Marijn Suijten
7c969c6e21 arm64: dts: qcom: Add PM6125 PMIC
This PMIC is commonly used on boards with an SM6125 SoC and looks very
similar in layout to the PM6150.

Downstream declares more nodes to be available, but these have been
omitted from this patch: the pwm/lpg block is unused on my reference
device making it impossible to test/validate, and the spmi-clkdiv does
not have a single device-tree binding using this driver yet, hence
inclusion is better postponed until ie. audio which uses these clocks is
brought up.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220926190148.283805-4-marijn.suijten@somainline.org
2022-11-05 21:47:03 -05:00
Marijn Suijten
02549ba5de arm64: dts: qcom: pm660: Use unique ADC5_VCOIN address in node name
The register address in the node name is shadowing vph_pwr@83, whereas
the ADC5_VCOIN register resolves to 0x85.  Fix this copy-paste
discrepancy.

Fixes: 4bf0975405 ("arm64: dts: qcom: pm660: Add VADC and temp alarm nodes")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220926190148.283805-3-marijn.suijten@somainline.org
2022-11-05 21:47:03 -05:00
Dmitry Baryshkov
dd12b33d3c arm64: dts: qcom: msm8996: change HDMI PHY node name to generic one
Change HDMI PHY node name from custom 'hdmi-phy' to the generic 'phy'.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220924094347.178666-3-dmitry.baryshkov@linaro.org
2022-11-05 21:38:50 -05:00
Iskren Chernev
f110f2af3a arm64: dts: qcom: sm4250: Add support for oneplus-billie2
Add initial support for OnePlus Nord N100, based on SM4250. Currently
working:
- boots
- usb
- built-in flash storage (UFS)
- SD card reader

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220919180618.1840194-9-iskren.chernev@gmail.com
2022-10-28 17:00:08 -05:00
Iskren Chernev
70f18c6313 arm64: dts: qcom: sm4250: Add soc dtsi
The SM4250 is a downclocked version of the SM6115.

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220919180618.1840194-8-iskren.chernev@gmail.com
2022-10-28 17:00:08 -05:00
Iskren Chernev
97e563bf5b arm64: dts: qcom: sm6115: Add basic soc dtsi
Add support for Qualcomm SM6115 SoC. This includes:
- GCC
- Pinctrl
- RPM (CC+PD)
- USB
- MMC
- UFS

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220919180618.1840194-7-iskren.chernev@gmail.com
2022-10-28 17:00:08 -05:00
Johan Hovold
c4cd760d36 arm64: dts: qcom: sc8280xp: add TCSR node
Add the TCSR node which is needed for PCIe configuration.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024125843.25261-1-johan+linaro@kernel.org
2022-10-28 16:27:56 -05:00
Nikita Travkin
5ffe618764 arm64: dts: qcom: msm8916-samsung-a2015: Add vibrator
Both a2015 devices use motor drivers controlled with PWM signal.
A5 additionally has a fixed regulator that powers the driver and is
controlled by enable signal. A3 routes that enable signal to the
motor driver itself.
To simplify the description, add the motor to the common dtsi and
assume a regulator is used for both.

Signed-off-by: Nikita Travkin <nikita@trvn.ru>
[Rename the nodes to be reusable in msm8916-sansung-e2015]
Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221020115255.2026-1-linmengbo0689@protonmail.com
2022-10-28 16:25:54 -05:00
Bryan O'Donoghue
aab0dd5cf1 arm64: dts: qcom: msm8916: Fix lpass compat string to match yaml
The documented yaml compat string for the apq8016 is
"qcom,apq8016-lpass-cpu" not "qcom,lpass-cpu-apq8016". Looking at the other
lpass compat strings the general form is "qcom,socnum-lpass-cpu".

We need to fix both the driver and dts to match.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220628120435.3044939-3-bryan.odonoghue@linaro.org
2022-10-19 19:49:00 -05:00
Vladimir Lypak
cf6c35d1bc arm64: dts: qcom: msm8953: add MDSS
Add the MDSS, MDP and DSI nodes that are found on msm8953 SoC.

Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016161554.673006-4-luca@z3ntu.xyz
2022-10-17 22:01:47 -05:00
Vladimir Lypak
c0b9575a36 arm64: dts: qcom: msm8953: add APPS IOMMU
Add the nodes describing the iommu and its context banks that are found
on msm8953 SoCs.

Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016161554.673006-3-luca@z3ntu.xyz
2022-10-17 22:01:47 -05:00
Caleb Connolly
4772c03002 arm64: dts: qcom: sdm845-*: fix uart6 aliases
Some devices have been using hsuart0 as an alias for the bluetooth UART,
rename this to serial1

Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016172944.1892206-4-kc@postmarketos.org
2022-10-17 22:01:47 -05:00
Dylan Van Assche
9833e23b69 arm64: dts: qcom: sdm845-shift-axolotl: fix Bluetooth
Add serial1 alias, firmware name and use 4 pin UART pinmux.

Signed-off-by: Dylan Van Assche <me@dylanvanassche.be>
Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016172944.1892206-3-kc@postmarketos.org
2022-10-17 22:01:46 -05:00