Inochi Amaoto f5742f67a4 riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC ... Add reset generator node for all CV18XX series SoC. Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Tested-by: Junhui Liu <junhui.liu@pigmoral.tech> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://lore.kernel.org/r/20250617070144.1149926-4-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>		2025-07-23 09:55:14 +08:00
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allwinner	riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree	2025-01-18 12:33:27 -08:00
canaan	riscv: dts: canaan: Disable I/O devices unless used	2024-05-28 12:25:54 +01:00
microchip	riscv: dts: microchip: update pcie reg properties to new format	2025-02-04 20:28:06 +00:00
renesas	riscv: dts: renesas: Add specific RZ/Five cache compatible	2025-05-14 13:30:06 +02:00
sifive
sophgo	riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC	2025-07-23 09:55:14 +08:00
spacemit	riscv: dts: spacemit: add gpio LED for system heartbeat	2025-05-14 11:43:59 +08:00
starfive	riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader	2025-05-15 21:08:27 +01:00
thead	riscv: dts: thead: Add device tree VO clock controller	2025-05-07 23:38:41 -07:00
Makefile	riscv: migrate to the generic rule for built-in DTB	2025-03-18 13:30:13 +00:00