Wesley Chalmers a659f2fdf8 drm/amd/display: Add interface to get Calibrated Avg Level from FIFO ... [WHY] Hardware has handed down a new sequence requiring the value of this register be read from clk_mgr. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-06-15 17:25:41 -04:00
..
athub	drm/amdgpu: Add ATHUB 2.1 header files (v2)	2020-06-03 13:51:55 -04:00
bif
clk	drm/amdgpu: add vangogh asic header files (v2)	2020-10-05 15:14:02 -04:00
dce	drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling	2020-08-26 16:40:18 -04:00
dcn	drm/amd/display: Add interface to get Calibrated Avg Level from FIFO	2021-06-15 17:25:41 -04:00
df	drm/amdgpu: Query correct register for DF hashing on Aldebaran	2021-05-19 22:44:19 -04:00
dpcs	drm/amdgpu: add yellow carp asic header files (v3)	2021-06-04 16:03:05 -04:00
gc	drm/amdgpu: only harvest gcea/mmea error status in arcturus	2021-04-20 21:35:45 -04:00
gca
gmc
hdp
mmhub	drm/amdgpu: add mmhub v1_7 ip headers (v3)	2021-03-10 00:01:00 -05:00
mp	drm/amdgpu: add yellow carp asic header files (v3)	2021-06-04 16:03:05 -04:00
nbif
nbio	drm/amdgpu: add vangogh asic header files (v2)	2020-10-05 15:14:02 -04:00
oss	drm/amdgpu: add osssys v4_2 ip headers (v2)	2020-12-23 15:05:20 -05:00
pwr
rsmu
sdma	drm/amdgpu: add sdma v4_4_0 ip headers (v2)	2021-03-10 00:01:10 -05:00
sdma0
sdma1
sdma2
sdma3
sdma4
sdma5
sdma6
sdma7
smu
smuio	drm/amdgpu: add smuio v13_0_2 ip headers (v3)	2021-03-10 00:01:06 -05:00
thm	drm/amdgpu: add thm v13_0_2 ip headers (v3)	2021-03-10 00:01:15 -05:00
umc	drm/amdgpu: add umc v6_7_0 ip headers (v3)	2021-03-10 00:01:18 -05:00
uvd	drm/amd/amdgpu: add mmUVD_FW_STATUS register to uvd700	2020-09-17 17:59:54 -04:00
vce
vcn	drm/amdgpu: add vcn v2_6_0 ip headers (v3)	2021-03-10 00:01:20 -05:00
wafl
xgmi