mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-09-18 22:14:16 +00:00
12f7936c7a
In accordance with [1] the CX_NFUNC IP-core synthesize parameter is responsible for the number of physical functions to support in the EP mode. Its upper limit is 32. Let's use it to constrain the number of PCIe functions the DW PCIe EP DT-nodes can advertise. [1] Synopsys DesignWare Cores PCI Express Controller Databook - DWC PCIe Endpoint, Version 5.40a, March 2019, p. 887. Link: https://lore.kernel.org/r/20221113191301.5526-9-Sergey.Semin@baikalelectronics.ru Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org>
68 lines
1.7 KiB
YAML
68 lines
1.7 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Synopsys DesignWare PCIe endpoint interface
|
|
|
|
maintainers:
|
|
- Jingoo Han <jingoohan1@gmail.com>
|
|
- Gustavo Pimentel <gustavo.pimentel@synopsys.com>
|
|
|
|
description: |
|
|
Synopsys DesignWare PCIe host controller endpoint
|
|
|
|
# Please create a separate DT-schema for your DWC PCIe Endpoint controller
|
|
# and make sure it's assigned with the vendor-specific compatible string.
|
|
select:
|
|
properties:
|
|
compatible:
|
|
const: snps,dw-pcie-ep
|
|
required:
|
|
- compatible
|
|
|
|
allOf:
|
|
- $ref: /schemas/pci/pci-ep.yaml#
|
|
- $ref: /schemas/pci/snps,dw-pcie-common.yaml#
|
|
|
|
properties:
|
|
reg:
|
|
description: |
|
|
It should contain Data Bus Interface (dbi) and config registers for all
|
|
versions.
|
|
For designware core version >= 4.80, it may contain ATU address space.
|
|
minItems: 2
|
|
maxItems: 4
|
|
|
|
reg-names:
|
|
minItems: 2
|
|
maxItems: 4
|
|
items:
|
|
enum: [dbi, dbi2, config, atu, addr_space, link, atu_dma, appl]
|
|
|
|
max-functions:
|
|
maximum: 32
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- reg-names
|
|
|
|
additionalProperties: true
|
|
|
|
examples:
|
|
- |
|
|
pcie-ep@dfd00000 {
|
|
compatible = "snps,dw-pcie-ep";
|
|
reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
|
|
<0xdfc01000 0x0001000>, /* IP registers 2 */
|
|
<0xd0000000 0x2000000>; /* Configuration space */
|
|
reg-names = "dbi", "dbi2", "addr_space";
|
|
|
|
phys = <&pcie_phy0>, <&pcie_phy1>, <&pcie_phy2>, <&pcie_phy3>;
|
|
phy-names = "pcie0", "pcie1", "pcie2", "pcie3";
|
|
|
|
max-link-speed = <3>;
|
|
max-functions = /bits/ 8 <4>;
|
|
};
|