linux/drivers/gpu/drm/msm/adreno
Dmitry Baryshkov 217ed15bd3 drm/msm: enable separate binding of GPU and display devices
There are cases when we want to have separate DRM devices for GPU and
display pipelines.
One example is development, when it is beneficial to be able to bind the
GPU driver separately, without the display pipeline (and without the
hacks adding "amd,imageon" to the compatible string).
Another example is some of Qualcomm platforms, which have two MDSS
units, but only one GPU. With current approach it is next to impossible
to support this usecase properly, while separate binding allows users to
have three DRM devices: two for MDSS units and a single headless GPU.

Add kernel param msm.separate_gpu_kms, which if set to true forces
creation of separate display and GPU DRM devices. Mesa supports this
setup by using the kmsro wrapper.

The param is disabled by default, in order to be able to test userspace
for the compatibility issues. Simple clients are able to handle this
setup automatically.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/662590/
[Rob: renamed the modparam to separate_gpu_kms, and add missing
      DRIVER_GEM_GPUVA]
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2025-07-05 07:37:21 -07:00
..
a2xx_catalog.c drm/msm/adreno: Remove MODULE_FIRMWARE()'s 2025-05-10 09:06:36 -07:00
a2xx_gpu.c drm/msm: Use drm_gpuvm types more 2025-07-04 17:48:35 -07:00
a2xx_gpu.h drm/msm: move msm_gpummu.c to adreno/a2xx_gpummu.c 2024-04-22 16:22:49 +03:00
a2xx_gpummu.c drm/msm: Add mmu support for non-zero offset 2025-07-04 17:48:35 -07:00
a3xx_catalog.c drm/msm/adreno: Remove MODULE_FIRMWARE()'s 2025-05-10 09:06:36 -07:00
a3xx_gpu.c drm/msm: Remove vram carveout support 2025-07-04 11:09:44 -07:00
a3xx_gpu.h
a4xx_catalog.c drm/msm/adreno: Remove MODULE_FIRMWARE()'s 2025-05-10 09:06:36 -07:00
a4xx_gpu.c drm/msm: Remove vram carveout support 2025-07-04 11:09:44 -07:00
a4xx_gpu.h
a5xx_catalog.c drm/msm/adreno: Remove MODULE_FIRMWARE()'s 2025-05-10 09:06:36 -07:00
a5xx_debugfs.c drm/msm: Rename msm_gem_address_space -> msm_gem_vm 2025-07-04 11:09:44 -07:00
a5xx_gpu.c drm/msm/adreno: Switch to the common UBWC config struct 2025-07-04 17:48:41 -07:00
a5xx_gpu.h drm/msm/a5xx: workaround early ring-buffer emptiness check 2024-09-01 08:17:53 -07:00
a5xx_power.c drm/msm: Rename msm_gem_address_space -> msm_gem_vm 2025-07-04 11:09:44 -07:00
a5xx_preempt.c drm/msm: Rename msm_gem_address_space -> msm_gem_vm 2025-07-04 11:09:44 -07:00
a6xx_catalog.c drm/msm: Update register xml 2025-07-04 17:48:39 -07:00
a6xx_gmu.c drm/msm: Use drm_gpuvm types more 2025-07-04 17:48:35 -07:00
a6xx_gmu.h drm/msm: Use drm_gpuvm types more 2025-07-04 17:48:35 -07:00
a6xx_gpu.c drm/msm/adreno: Switch to the common UBWC config struct 2025-07-04 17:48:41 -07:00
a6xx_gpu.h drm/msm: Update register xml 2025-07-04 17:48:39 -07:00
a6xx_gpu_state.c drm/msm: Update register xml 2025-07-04 17:48:39 -07:00
a6xx_gpu_state.h drm/msm: Update register xml 2025-07-04 17:48:39 -07:00
a6xx_hfi.c drm/msm/a6xx: Increase HFI response timeout 2025-05-04 09:20:29 -07:00
a6xx_hfi.h drm/msm/adreno: Add support for ACD 2025-05-04 09:20:28 -07:00
a6xx_preempt.c drm/msm: Update register xml 2025-07-04 17:48:39 -07:00
adreno_device.c drm/msm: enable separate binding of GPU and display devices 2025-07-05 07:37:21 -07:00
adreno_gen7_0_0_snapshot.h drm/msm: More fully implement devcoredump for a7xx 2024-02-26 07:29:55 -08:00
adreno_gen7_2_0_snapshot.h drm/msm: More fully implement devcoredump for a7xx 2024-02-26 07:29:55 -08:00
adreno_gen7_9_0_snapshot.h drm/msm: Update register xml 2025-07-04 17:48:39 -07:00
adreno_gpu.c drm/msm/adreno: Switch to the common UBWC config struct 2025-07-04 17:48:41 -07:00
adreno_gpu.h drm/msm/adreno: Switch to the common UBWC config struct 2025-07-04 17:48:41 -07:00