Commit graph

444 commits

Author SHA1 Message Date
Linus Torvalds
9c39d5ab45 soc: devicetree updates for 6.13
This release adds the devicetree files for an impressive number of new
 SoC variants, though as expected these are all related to others we
 already support:
 
  - The microchip sam9x7 devicetree is now added, after the device driver
    and platform code has already made it in. This is likely the last ARMv5
    (!)  platform to ever get added, updating the 20+ year old at91/sam9
    platform wtih DDR3 memory and gigabit ethernet.
 
  - On the Apple platform, there are now devicetree files for a number of
    A-series SoCs in addition to the M-series ones, these are used
    primarily in phones and tablets, but are closely related to the
    already supported chips.
 
  - Samsung Exynos 8895 and Exynos 990 are more phone SoCs used in older
    Samsung Galaxy phones.
 
  - Qualcomm Snapdragon 778G (SM7325) is another phone SoC, closely related
    to the Snapdragon 7c+ Gen 3 (SC7280) used in low-end laptops.
 
  - Rockchip RK3528 and RK3576 are new variants of their TV box and Tablet
    chips, still using the older ARMv8.0 cores from RK3328/RK3399 but
    with a newer process and other improvements from the RK35xx (otherwise
    ARMv8.2) chips.  RK3566T and RK3399-S are also added, these are just
    lower-cost versions of their normal counterparts.
 
  - TI J742S2 is a feature-reduced version of the J784s4
    industrial/automotive SoC, with fewer CPU cores.
 
  - Sophgo SG2002 is an embedded SoC with one RISC-V (C906) and one ARM
    (Cortex-A53) core, at this point support is only added for running
    on the RISC-V side on the LicheeRV Nano board.
 
 A total of 92 new .dts files describing individual machines is added,
 which must be a new record. The majority of these is for the newly added
 chips above, notably all the Apple phones and tablets.  The other new
 machines include nine industrial/embedded boards with NXP i.MX6 or i.MX8
 SoCs, eight for Rockchips RK35XX and one or two each for Rockchips RV1109,
 RK3308, Allwinner A33, Tegra 234, Qualcomm qcs9100/sc8280xp/x1e80100,
 TI AM625 and Starfive JH7110.
 
 As usual there are also many newlyad added features in existing boards
 as well as cleanups and minor bugfixes.
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Merge tag 'soc-dt-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
 "This release adds the devicetree files for an impressive number of new
  SoC variants, though as expected these are all related to others we
  already support:

   - The microchip sam9x7 devicetree is now added, after the device
     driver and platform code has already made it in. This is likely the
     last ARMv5 (!) platform to ever get added, updating the 20+ year
     old at91/sam9 platform with DDR3 memory and gigabit ethernet.

   - On the Apple platform, there are now devicetree files for a number
     of A-series SoCs in addition to the M-series ones, these are used
     primarily in phones and tablets, but are closely related to the
     already supported chips.

   - Samsung Exynos 8895 and Exynos 990 are more phone SoCs used in
     older Samsung Galaxy phones.

   - Qualcomm Snapdragon 778G (SM7325) is another phone SoC, closely
     related to the Snapdragon 7c+ Gen 3 (SC7280) used in low-end
     laptops.

   - Rockchip RK3528 and RK3576 are new variants of their TV box and
     Tablet chips, still using the older ARMv8.0 cores from
     RK3328/RK3399 but with a newer process and other improvements from
     the RK35xx (otherwise ARMv8.2) chips. RK3566T and RK3399-S are also
     added, these are just lower-cost versions of their normal
     counterparts.

   - TI J742S2 is a feature-reduced version of the J784s4
     industrial/automotive SoC, with fewer CPU cores.

   - Sophgo SG2002 is an embedded SoC with one RISC-V (C906) and one ARM
     (Cortex-A53) core, at this point support is only added for running
     on the RISC-V side on the LicheeRV Nano board.

  A total of 92 new .dts files describing individual machines is added,
  which must be a new record. The majority of these is for the newly
  added chips above, notably all the Apple phones and tablets. The other
  new machines include nine industrial/embedded boards with NXP i.MX6 or
  i.MX8 SoCs, eight for Rockchips RK35XX and one or two each for
  Rockchips RV1109, RK3308, Allwinner A33, Tegra 234, Qualcomm
  qcs9100/sc8280xp/x1e80100, TI AM625 and Starfive JH7110.

  As usual there are also many newly added features in existing boards
  as well as cleanups and minor bugfixes"

* tag 'soc-dt-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (718 commits)
  arm64: dts: apm: Remove unused and undocumented "bus_num" property
  arm: dts: spear13xx: Remove unused and undocumented "pl022,slave-tx-disable" property
  arm64: dts: amd: Remove unused and undocumented "amd,zlib-support" property
  arm64: dts: lg131x: Update spi clock properties
  arm64: dts: seattle: Update spi clock properties
  arm64: dts: rockchip: use less broad pinctrl for pcie3x1 on Radxa E25
  arm64: dts: rockchip: add Radxa ROCK 5C
  dt-bindings: arm: rockchip: add Radxa ROCK 5C
  arm64: dts: rockchip: orangepi-5-plus: Enable GPU
  arm64: dts: rockchip: enable USB3 on NanoPC-T6
  arm64: dts: rockchip: adapt regulator nodenames to preferred form
  arm64: dts: rockchip: Enable HDMI display for rk3588 Cool Pi GenBook
  arm64: dts: rockchip: Enable HDMI display for rk3588 Cool Pi 4B
  arm64: dts: rockchip: Enable HDMI0 for rk3588 Cool Pi CM5 EVB
  arm64: dts: rockchip: Enable HDMI on NanoPi R6C/R6S
  arm64: dts: rockchip: Enable GPU on NanoPi R6C/R6S
  arm64: dts: rockchip: Enable HDMI on Hardkernel ODROID-M2
  arm64: dts: rockchip: Remove non-removable flag from sdmmc on rk3576-sige5
  arm64: dts: allwinner: a100: perf1: Add eMMC and MMC node
  arm64: dts: allwinner: pinephone: Add mount matrix to accelerometer
  ...
2024-11-20 15:26:46 -08:00
Arnd Bergmann
6660a1236f RISC-V Devicetrees for v6.13
StarFive:
 Support for the DeepComputing FML13V01, a Framework laptop compatible
 with a JH7110. This board is fairly different to the more standard SBCs
 offerings that the kernel already supports, so there's also some
 refactoring of jh7110-common.dtsi to move out nodes unused on the new
 board.
 
 Spacemit:
 A vendor prefix I grabbed from the basic support series, since its
 dependencies are not yet ready but peripheral drivers have started being
 merged.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Merge tag 'riscv-dt-for-v6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt

RISC-V Devicetrees for v6.13

StarFive:
Support for the DeepComputing FML13V01, a Framework laptop compatible
with a JH7110. This board is fairly different to the more standard SBCs
offerings that the kernel already supports, so there's also some
refactoring of jh7110-common.dtsi to move out nodes unused on the new
board.

Spacemit:
A vendor prefix I grabbed from the basic support series, since its
dependencies are not yet ready but peripheral drivers have started being
merged.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: starfive: add DeepComputing FML13V01 board device tree
  dt-bindings: riscv: starfive: add deepcomputing,fml13v01
  dt-bindings: vendor: add deepcomputing
  riscv: dts: starfive: jh7110-common: move usb0 config to board dts
  riscv: dts: starfive: jh7110-common: revised device node
  dt-bindings: vendor-prefixes: add spacemit

Link: https://lore.kernel.org/r/20241108-washboard-material-6b9ff196063d@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-11-12 22:57:20 +01:00
Arnd Bergmann
44533285bd RISC-V Devicetrees for v6.13
Sophgo:
 Add pinctrl support for CV1800B & CV1812H.
 Add SARADC support for CV1800B.
 Add initial LicheeRV-Nano/SG2002.
 Add emmc/sdio support for Huashan-Pi/CV1812H.
 Add power-key support for PioneerBox/SG2042.
 
 Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
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Merge tag 'riscv-sophgo-dt-for-v6.13' of https://github.com/sophgo/linux into soc/dt

RISC-V Devicetrees for v6.13

Sophgo:
Add pinctrl support for CV1800B & CV1812H.
Add SARADC support for CV1800B.
Add initial LicheeRV-Nano/SG2002.
Add emmc/sdio support for Huashan-Pi/CV1812H.
Add power-key support for PioneerBox/SG2042.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* tag 'riscv-sophgo-dt-for-v6.13' of https://github.com/sophgo/linux:
  riscv: dts: sophgo: Add emmc support for Huashan Pi
  riscv: dts: sophgo: Add sdio configuration for Huashan Pi
  riscv: dts: sophgo: fix pinctrl base-address
  riscv: sophgo: dts: add power key for pioneer box
  riscv: dts: sophgo: Add SARADC description for Sophgo CV1800B
  riscv: dts: sophgo: Add LicheeRV Nano board device tree
  riscv: dts: sophgo: Add initial SG2002 SoC device tree
  riscv: dts: sophgo: cv1812h: add pinctrl support
  riscv: dts: sophgo: cv1800b: add pinctrl support

Link: https://lore.kernel.org/r/MA0P287MB2822DC23E1EE47A5C7D41476FE532@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-11-12 22:48:14 +01:00
Arnd Bergmann
735ac12ee8 Renesas DTS updates for v6.13
- Add support for PCIe on the R-Car V4M SoC and the Gray Hawk
     development board,
   - Add support for watchdog, OS timer, keyboard switch, SDHI, and MMCIF
     on the Genmai development board,
   - Add support for watchdog on the RSK+RZA1 development board,
   - Add support for QSPI NOR FLASH on the RZ/G2UL SMARC SoM,
   - Add support for E-FUSE on the R-Car V3U, S4-8, V4H, and V4M SoCs,
   - Use interrupts-extended where it makes sense,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-dts-for-v6.13-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.13

  - Add support for PCIe on the R-Car V4M SoC and the Gray Hawk
    development board,
  - Add support for watchdog, OS timer, keyboard switch, SDHI, and MMCIF
    on the Genmai development board,
  - Add support for watchdog on the RSK+RZA1 development board,
  - Add support for QSPI NOR FLASH on the RZ/G2UL SMARC SoM,
  - Add support for E-FUSE on the R-Car V3U, S4-8, V4H, and V4M SoCs,
  - Use interrupts-extended where it makes sense,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.13-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (53 commits)
  arm64: dts: renesas: rzg3s-smarc: Use interrupts-extended for gpio-keys
  arm64: dts: renesas: beacon-renesom: Use interrupts-extended for touchscreen
  arm64: dts: renesas: Use interrupts-extended for WLAN
  arm64: dts: renesas: Use interrupts-extended for video decoders
  arm64: dts: renesas: Use interrupts-extended for USB muxes
  arm64: dts: renesas: Use interrupts-extended for PMICs
  arm64: dts: renesas: Use interrupts-extended for I/O expanders
  arm64: dts: renesas: Use interrupts-extended for HDMI bridges
  arm64: dts: renesas: Use interrupts-extended for Ethernet PHYs
  arm64: dts: renesas: Use interrupts-extended for DisplayPort bridges
  ARM: dts: renesas: kzm9g: Use interrupts-extended for sensors
  ARM: dts: renesas: kzm9g: Use interrupts-extended for I/O expander
  ARM: dts: renesas: r8a7742-iwg21m: Use interrupts-extended for RTC
  ARM: dts: renesas: iwg22d-sodimm: Use interrupts-extended for port expander
  ARM: dts: renesas: Use interrupts-extended for video decoders
  ARM: dts: renesas: Use interrupts-extended for touchpanels
  ARM: dts: renesas: Use interrupts-extended for PMICs
  ARM: dts: renesas: Use interrupts-extended for HDMI bridges
  ARM: dts: renesas: Use interrupts-extended for Ethernet PHYs
  ARM: dts: renesas: Use interrupts-extended for Ethernet MACs
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-11-12 22:27:41 +01:00
Emil Renner Berthing
7e756671a6 riscv: dts: thead: Add TH1520 ethernet nodes
Add gmac, mdio, and phy nodes to enable the gigabit Ethernet ports on
the BeagleV Ahead and Sipeed Lichee Pi 4a boards.

Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
[drew: change apb registers from syscon to second reg of gmac node,
       add phy reset delay properties for beaglev ahead]
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-11-06 17:03:42 -08:00
Inochi Amaoto
b5cf65cc0f riscv: dts: sophgo: Add emmc support for Huashan Pi
Add emmc node configuration for Huashan Pi.

Link: https://lore.kernel.org/r/20241025112902.1200716-3-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-11-02 19:19:08 +08:00
Inochi Amaoto
06133f48a8 riscv: dts: sophgo: Add sdio configuration for Huashan Pi
Add configuration for sdio for Huashan Pi to support sdio wifi.

Link: https://lore.kernel.org/r/20241025112902.1200716-2-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-11-02 19:19:08 +08:00
Thomas Bonnefille
44196383a2 riscv: dts: sophgo: fix pinctrl base-address
Fix the base-address of the pinctrl controller to match its register
address.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Fixes: 93b61555f5 ("riscv: dts: sophgo: Add initial SG2002 SoC device tree")
Link: https://lore.kernel.org/r/20241028-fix-address-v1-1-dcbe21e59ccf@bootlin.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-11-02 19:16:46 +08:00
Arnd Bergmann
e5c06efdc0 RISC-V soc fixes for v6.12-rc6
StarFive:
 Two minor dts fixes, one setting the correct eth phy delay parameters
 and one disabling unused nodes that caused warnings at probe time.
 
 Firmware:
 Fix the poll_complete() implementation in the auto-update driver so that
 it behaves as the framework expects.
 
 Misc:
 Update the maintainer pattern for my dts entry, so that it covers
 the specific platforms listed , rather than including all riscv
 platforms with the list platforms excluded.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Merge tag 'riscv-soc-fixes-for-v6.12-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into HEAD

RISC-V soc fixes for v6.12-rc6

StarFive:
Two minor dts fixes, one setting the correct eth phy delay parameters
and one disabling unused nodes that caused warnings at probe time.

Firmware:
Fix the poll_complete() implementation in the auto-update driver so that
it behaves as the framework expects.

Misc:
Update the maintainer pattern for my dts entry, so that it covers
the specific platforms listed , rather than including all riscv
platforms with the list platforms excluded.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-soc-fixes-for-v6.12-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  MAINTAINERS: invert Misc RISC-V SoC Support's pattern
  riscv: dts: starfive: Update ethernet phy0 delay parameter values for Star64
  riscv: dts: starfive: disable unused csi/camss nodes
  firmware: microchip: auto-update: fix poll_complete() to not report spurious timeout errors

Link: https://lore.kernel.org/r/20241031-colossal-cassette-617817c9bec3@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-11-01 15:47:35 +01:00
Sandie Cao
c8b72c301d riscv: dts: starfive: add DeepComputing FML13V01 board device tree
The FML13V01 board from DeepComputing incorporates a StarFive JH7110 SoC.
It is a mainboard designed for the Framework Laptop 13 Chassis, which has
(Framework) SKU FRANHQ0001.

The FML13V01 board features:
- StarFive JH7110 SoC
- LPDDR4 8GB
- eMMC 32GB or 128GB
- QSPI Flash
- MicroSD Slot
- PCIe-based Wi-Fi
- 4 USB-C Ports
 - Port 1: PD 3.0 (60W Max), USB 3.2 Gen 1, DP 1.4 (4K@30Hz/2.5K@60Hz)
 - Port 2: PD 3.0 (60W Max), USB 3.2 Gen 1
 - Port 3 & 4: USB 3.2 Gen 1

Create the DTS file for the DeepComputing FML13V01 board. Based on
'jh7110-common.dtsi', usb0 is enabled and is set to operate as a "host".

Signed-off-by: Sandie Cao <sandie.cao@deepcomputing.io>
[elder@riscstar.com: revised the description, updated some nodes]
Signed-off-by: Alex Elder <elder@riscstar.com>
Signed-off-by: Guodong Xu <guodong@riscstar.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-10-31 12:22:53 +00:00
Guodong Xu
817eac165e riscv: dts: starfive: jh7110-common: move usb0 config to board dts
The JH7110 USB0 can operate as a dual-role USB device.  Different
boards can have different configuration.

For all current boards this device operates in peripheral mode, but
on a new board this operates in host mode.  This property will no
longer be common, so define the "dr_mode" property in the board files
rather than in the common DTSI file.

Signed-off-by: Alex Elder <elder@riscstar.com>
Signed-off-by: Guodong Xu <guodong@riscstar.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-10-31 12:22:53 +00:00
Guodong Xu
5a5001d270 riscv: dts: starfive: jh7110-common: revised device node
Earlier this year a new DTSI file was created to define common
properties for the StarFive VisionFive 2 and Milk-V Mars boards,
both of which use the StarFive JH7110 SoC.  The Pine64 Star64
board has also been added since that time.

Some of the nodes defined in "jh7110-common.dtsi" are enabled in
that file because all of the boards including it "want" them
enabled.

An upcoming patch enables another JH7110 board, but for that
board not all of these common nodes should be enabled.  Prepare
for supporting the new board by avoiding enabling these nodes in
"jh7110-common.dtsi", and enable them instead in these files:
   jh7110-milkv-mars.dts
   jh7110-pine64-star64.dts
   jh7110-starfive-visionfive-2.dtsi

Signed-off-by: Alex Elder <elder@riscstar.com>
Signed-off-by: Guodong Xu <guodong@riscstar.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-10-31 12:22:53 +00:00
Uwe Kleine-König
d99913e1b8 riscv: dts: Replace deprecated snps,nr-gpios property for snps,dw-apb-gpio-port devices
snps,dw-apb-gpio-port is deprecated since commit ef42a8da3c
("dt-bindings: gpio: dwapb: Add ngpios property support"). The
respective driver supports this since commit 7569486d79 ("gpio: dwapb:
Add ngpios DT-property support") which is included in Linux v5.10-rc1.

This change was created using

	git grep -l snps,nr-gpios arch/riscv/boot/dts | xargs perl -p -i -e 's/\bsnps,nr-gpios\b/ngpios/

.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Fixes: a508d794f8 ("riscv: sophgo: dts: add gpio controllers for SG2042 SoC")
Link: https://lore.kernel.org/r/20241022091428.477697-8-u.kleine-koenig@baylibre.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-10-25 19:32:16 +08:00
E Shattow
825bb69228 riscv: dts: starfive: Update ethernet phy0 delay parameter values for Star64
Improve function of Star64 bottom network port phy0 with updated delay values.
Initial upstream patches supporting Star64 use the same vendor board support
package parameters known to result in an unreliable bottom network port.

Success acquiring DHCP lease and no dropped packets to ping LAN address:
rx  900: tx 1500 1650 1800 1950
rx  750: tx      1650 1800 1950
rx  600: tx           1800 1950
rx 1050: tx      1650 1800 1950
rx 1200: tx 1500 1650 1800 1950
rx 1350: tx 1500 1650 1800 1950
rx 1500: tx 1500 1650 1800 1950
rx 1650: tx 1500 1650 1800 1950
rx 1800: tx 1500 1650 1800 1950
rx 1900: tx                1950
rx 1950: tx                1950

Failure acquiring DHCP lease or many dropped packets:
rx  450: tx                1500      1800 1950
rx  600: tx      1200 1350      1650
rx  750: tx           1350 1500
rx  900: tx      1200 1350
rx 1050: tx 1050 1200 1350 1500
rx 1200: tx           1350
rx 1350: tx           1350
rx 1500: tx      1200 1350
rx 1650: tx 1050 1200 1350
rx 1800: tx 1050 1200 1350
rx 1900: tx                1500 1650 1800
rx 1950: tx      1200 1350

Non-functional:
rx    0: tx 0  150  300  450  600  750  900 1050 1200 1350 1500 1650 1800 1950
rx  150: tx 0  150  300  450  600  750  900 1050 1200 1350 1500 1650 1800 1950
rx  300: tx 0  150  300  450  600  750  900 1050 1200 1350 1500 1650 1800 1950
rx  450: tx 0  150  300  450  600  750  900 1050 1200 1350      1650
rx  600: tx 0  150  300  450  600  750  900 1050
rx  750: tx 0  150  300  450  600  750  900 1050 1200
rx  900: tx 0  150  300  450  600  750  900 1050
rx 1050: tx 0  150  300  450  600  750  900
rx 1200: tx 0  150  300  450  600  750  900 1050 1200
rx 1350: tx 0  150  300  450  600  750  900 1050 1200
rx 1500: tx 0  150  300  450  600  750  900 1050
rx 1650: tx 0  150  300  450  600  750  900
rx 1800: tx 0  150  300  450  600  750  900
rx 1900: tx 0  150  300  450  600  750  900 1050 1200 1350
rx 1950: tx 0  150  300  450  600  750  900 1050

Selecting the median of all working rx delay values 1500 combined with tx delay
values 1500, 1650, 1800, and 1950 only the tx delay value of 1950 (default) is
reliable as tested in both Linux 6.11.2 and U-Boot v2024.10

Signed-off-by: E Shattow <e@freeshell.de>
CC: stable@vger.kernel.org
Fixes: 2606bf583b ("riscv: dts: starfive: add Star64 board devicetree")
Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-10-23 11:28:04 +01:00
Chen Wang
128bded4bc riscv: sophgo: dts: add power key for pioneer box
There is a power button on the front panel of the pioneer box.
Short pressing the button will trigger the onboard MCU to
notify SG2042 through GPIO22 to enter the power-off process.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/12e65a99f1b52c52b7372e900a203063b30c74b5.1728350655.git.unicorn_wang@outlook.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
2024-10-22 10:00:31 +08:00
Thomas Bonnefille
45a544a62e riscv: dts: sophgo: Add SARADC description for Sophgo CV1800B
Add SARADC node for the Successive Approximation Analog to
Digital Converter used in Sophgo CV1800B SoC.
This patch only adds the active domain controller.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/r/20240829-sg2002-adc-v5-3-aacb381e869b@bootlin.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-10-22 08:39:53 +08:00
Thomas Bonnefille
d32552307b riscv: dts: sophgo: Add LicheeRV Nano board device tree
LicheeRV Nano B [1] is an embedded development platform based on the SOPHGO
SG2002 chip, the B(ase) version is deprived of Wifi/Bluetooth and Ethernet.

Add only support for UART and SDHCI.

Link: https://wiki.sipeed.com/hardware/en/lichee/RV_Nano/1_intro.html [1]

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/r/20241010-sg2002-v5-2-a0f2e582b932@bootlin.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-10-22 08:35:16 +08:00
Thomas Bonnefille
93b61555f5 riscv: dts: sophgo: Add initial SG2002 SoC device tree
Add initial device tree for the SG2002 RISC-V SoC by SOPHGO.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/r/20241010-sg2002-v5-1-a0f2e582b932@bootlin.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-10-22 08:35:16 +08:00
Conor Dooley
2e11e78667 riscv: dts: starfive: disable unused csi/camss nodes
Aurelien reported probe failures due to the csi node being enabled
without having a camera attached to it. A camera was in the initial
submissions, but was removed from the dts, as it had not actually been
present on the board, but was from an addon board used by the
developer of the relevant drivers. The non-camera pipeline nodes were
not disabled when this happened and the probe failures are problematic
for Debian. Disable them.

CC: stable@vger.kernel.org
Fixes: 28ecaaa5af ("riscv: dts: starfive: jh7110: Add camera subsystem nodes")
Closes: https://lore.kernel.org/all/Zw1-vcN4CoVkfLjU@aurel32.net/
Reported-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-10-17 17:14:17 +01:00
Drew Fustini
2a3bf75a94 riscv: dts: thead: remove enabled property for spi0
There are currently no nodes that use spi0 so remove the enabled
property for it in the beaglev ahead and lpi4a dts files. It can be
re-enabled in the future if any peripherals will use it. The definition
of spi0 remains in the th1520.dtsi file.

Suggested-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-10-15 10:01:18 -07:00
Emil Renner Berthing
bcec43a092 riscv: dts: thead: Add missing GPIO clock-names
The gpio-dwapb looks for clock named "bus" so add clock-names property
for the gpio controller nodes.

Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
[dfustini: add two more lines to the commit message]
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-10-15 10:01:18 -07:00
Emil Renner Berthing
cce219d355 riscv: dtb: thead: Add BeagleV Ahead LEDs
Add nodes for the 5 user controllable LEDs on the BeagleV Ahead board.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-10-15 10:01:18 -07:00
Emil Renner Berthing
d7252a0731 riscv: dts: thead: Add TH1520 pinctrl settings for UART0
Add pinctrl settings for UART0 used as the default debug console on
both the Lichee Pi 4A and BeagleV Ahead boards.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-10-15 10:01:18 -07:00
Emil Renner Berthing
3893d1bfe0 riscv: dts: thead: Add Lichee Pi 4M GPIO line names
Add names for the GPIO00-GPIO14 lines of the SO-DIMM module.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-10-15 10:01:18 -07:00
Emil Renner Berthing
33d3a63f9a riscv: dts: thead: Adjust TH1520 GPIO labels
Adjust labels for the TH1520 GPIO controllers such that GPIOs can be
referenced by the names used by the documentation. Eg.

GPIO0_X  -> <&gpio0 X Y>
GPIO1_X  -> <&gpio1 X Y>
GPIO2_X  -> <&gpio2 X Y>
GPIO3_X  -> <&gpio3 X Y>
GPIO4_X  -> <&gpio4 X Y>
AOGPIO_X -> <&aogpio X Y>

Remove labels for the parent GPIO devices that shouldn't need to be
referenced.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-10-15 10:01:17 -07:00
Emil Renner Berthing
5ec423d1df riscv: dts: thead: Add TH1520 GPIO ranges
Add gpio-ranges properties to the TH1520 device tree, so user space can
change basic pinconf settings for GPIOs and are not allowed to use pads
already used by other functions.

Adjust number of GPIOs available for the different controllers.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-10-15 10:01:17 -07:00
Emil Renner Berthing
566ab427f8 riscv: dts: thead: Add TH1520 pin control nodes
Add nodes for pin controllers on the T-Head TH1520 RISC-V SoC.

Add the missing aonsys_clk for the always-on pin controller as there is
not yet an aon subsys clock controller driver.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
[dfustini: modify description as there is now an ap_subsys clk driver]
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-10-15 10:01:17 -07:00
Biju Das
c0f2ec5683 arm64: dts: renesas: rzg2ul-smarc-som: Enable serial NOR flash
Enable Renesas at25ql128a flash connected to QSPI0. Also disable
the node from rzfive-smarc-som as it is untested.

Tested the flash by flashing bootloaders:
flash_erase /dev/mtd0  0 0
flash_erase /dev/mtd1  0 0
mtd_debug write /dev/mtd0 0 ${BL2_FILE_SIZE} ${BL2_IMAGE}
mtd_debug write /dev/mtd1 512 ${FIP_FILE_SIZE} ${FIP_IMAGE}

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241004173235.74307-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-10-09 13:47:07 +02:00
Inochi Amaoto
30003e3f80 riscv: dts: sophgo: cv1812h: add pinctrl support
Add pinctrl node for CV1812H SoC.

Link: https://lore.kernel.org/r/IA1PR20MB49533DB3D0C1861938185015BB992@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-10-04 13:06:51 +08:00
Inochi Amaoto
23c7816ddd riscv: dts: sophgo: cv1800b: add pinctrl support
Add pinctrl node and related pin configuration for CV1800B SoC.

Link: https://lore.kernel.org/r/IA1PR20MB49535E7F28242174CA318317BB992@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-10-04 13:06:51 +08:00
Linus Torvalds
7856a56541 Many singleton patches - please see the various changelogs for details.
Quite a lot of nilfs2 work this time around.
 
 Notable patch series in this pull request are:
 
 "mul_u64_u64_div_u64: new implementation" by Nicolas Pitre, with
 assistance from Uwe Kleine-König.  Reimplement mul_u64_u64_div_u64() to
 provide (much) more accurate results.  The current implementation was
 causing Uwe some issues in the PWM drivers.
 
 "xz: Updates to license, filters, and compression options" from Lasse
 Collin.  Miscellaneous maintenance and kinor feature work to the xz
 decompressor.
 
 "Fix some GDB command error and add some GDB commands" from Kuan-Ying Lee.
 Fixes and enhancements to the gdb scripts.
 
 "treewide: add missing MODULE_DESCRIPTION() macros" from Jeff Johnson.
 Adds lots of MODULE_DESCRIPTIONs, thus fixing lots of warnings about this.
 
 "nilfs2: add support for some common ioctls" from Ryusuke Konishi.  Adds
 various commonly-available ioctls to nilfs2.
 
 "This series fixes a number of formatting issues in kernel doc comments"
 from Ryusuke Konishi does that.
 
 "nilfs2: prevent unexpected ENOENT propagation" from Ryusuke Konishi.  Fix
 issues where -ENOENT was being unintentionally and inappropriately
 returned to userspace.
 
 "nilfs2: assorted cleanups" from Huang Xiaojia.
 
 "nilfs2: fix potential issues with empty b-tree nodes" from Ryusuke
 Konishi fixes some issues which can occur on corrupted nilfs2 filesystems.
 
 "scripts/decode_stacktrace.sh: improve error reporting and usability" from
 Luca Ceresoli does those things.
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Merge tag 'mm-nonmm-stable-2024-09-21-07-52' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm

Pull non-MM updates from Andrew Morton:
 "Many singleton patches - please see the various changelogs for
  details.

  Quite a lot of nilfs2 work this time around.

  Notable patch series in this pull request are:

   - "mul_u64_u64_div_u64: new implementation" by Nicolas Pitre, with
     assistance from Uwe Kleine-König. Reimplement mul_u64_u64_div_u64()
     to provide (much) more accurate results. The current implementation
     was causing Uwe some issues in the PWM drivers.

   - "xz: Updates to license, filters, and compression options" from
     Lasse Collin. Miscellaneous maintenance and kinor feature work to
     the xz decompressor.

   - "Fix some GDB command error and add some GDB commands" from
     Kuan-Ying Lee. Fixes and enhancements to the gdb scripts.

   - "treewide: add missing MODULE_DESCRIPTION() macros" from Jeff
     Johnson. Adds lots of MODULE_DESCRIPTIONs, thus fixing lots of
     warnings about this.

   - "nilfs2: add support for some common ioctls" from Ryusuke Konishi.
     Adds various commonly-available ioctls to nilfs2.

   - "This series fixes a number of formatting issues in kernel doc
     comments" from Ryusuke Konishi does that.

   - "nilfs2: prevent unexpected ENOENT propagation" from Ryusuke
     Konishi. Fix issues where -ENOENT was being unintentionally and
     inappropriately returned to userspace.

   - "nilfs2: assorted cleanups" from Huang Xiaojia.

   - "nilfs2: fix potential issues with empty b-tree nodes" from Ryusuke
     Konishi fixes some issues which can occur on corrupted nilfs2
     filesystems.

   - "scripts/decode_stacktrace.sh: improve error reporting and
     usability" from Luca Ceresoli does those things"

* tag 'mm-nonmm-stable-2024-09-21-07-52' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm: (103 commits)
  list: test: increase coverage of list_test_list_replace*()
  list: test: fix tests for list_cut_position()
  proc: use __auto_type more
  treewide: correct the typo 'retun'
  ocfs2: cleanup return value and mlog in ocfs2_global_read_info()
  nilfs2: remove duplicate 'unlikely()' usage
  nilfs2: fix potential oob read in nilfs_btree_check_delete()
  nilfs2: determine empty node blocks as corrupted
  nilfs2: fix potential null-ptr-deref in nilfs_btree_insert()
  user_namespace: use kmemdup_array() instead of kmemdup() for multiple allocation
  tools/mm: rm thp_swap_allocator_test when make clean
  squashfs: fix percpu address space issues in decompressor_multi_percpu.c
  lib: glob.c: added null check for character class
  nilfs2: refactor nilfs_segctor_thread()
  nilfs2: use kthread_create and kthread_stop for the log writer thread
  nilfs2: remove sc_timer_task
  nilfs2: do not repair reserved inode bitmap in nilfs_new_inode()
  nilfs2: eliminate the shared counter and spinlock for i_generation
  nilfs2: separate inode type information from i_state field
  nilfs2: use the BITS_PER_LONG macro
  ...
2024-09-21 08:20:50 -07:00
Linus Torvalds
7b17f5ebd5 soc: devicetree updates for 6.12
New SoC support for Broadcom bcm2712 (Raspberry Pi 5) and Renesas
 R9A09G057 (RZ/V2H(P)) and Qualcomm Snapdragon 414 (MSM8929), all three
 of these are variants of already supported chips, in particular the last
 one is almost identical to MSM8939.
 
 Lots of updates to Mediatek, ASpeed, Rockchips, Amlogic, Qualcomm,
 STM32, NXP i.MX, Sophgo, TI K3, Renesas, Microchip at91, NVIDIA Tegra,
 and T-HEAD.
 
 The added Qualcomm platform support once again dominates the changes,
 with seven phones and three laptops getting added in addition to
 many new features on existing machines. The Snapdragon X1E support
 specifically keeps improving.
 
 The other new machines are:
 
  - eight new machines using various 64-bit Rockchips SoCs, both
    on the consumer/gaming side and developer boards
  - three industrial boards with 64-bit i.MX, which is a very
    low number for them.
  - four more servers using a 32-bit Speed BMC
  - three boards using STM32MP1 SoCs
  - one new machine each using allwinner, amlogic, broadcom
    and renesas chips.
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Merge tag 'soc-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
 "New SoC support for Broadcom bcm2712 (Raspberry Pi 5) and Renesas
  R9A09G057 (RZ/V2H(P)) and Qualcomm Snapdragon 414 (MSM8929), all three
  of these are variants of already supported chips, in particular the
  last one is almost identical to MSM8939.

  Lots of updates to Mediatek, ASpeed, Rockchips, Amlogic, Qualcomm,
  STM32, NXP i.MX, Sophgo, TI K3, Renesas, Microchip at91, NVIDIA Tegra,
  and T-HEAD.

  The added Qualcomm platform support once again dominates the changes,
  with seven phones and three laptops getting added in addition to many
  new features on existing machines. The Snapdragon X1E support
  specifically keeps improving.

  The other new machines are:

   - eight new machines using various 64-bit Rockchips SoCs, both on the
     consumer/gaming side and developer boards

   - three industrial boards with 64-bit i.MX, which is a very low
     number for them.

   - four more servers using a 32-bit Speed BMC

   - three boards using STM32MP1 SoCs

   - one new machine each using allwinner, amlogic, broadcom and renesas
     chips"

* tag 'soc-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (672 commits)
  arm64: dts: allwinner: h5: NanoPi NEO Plus2: Use regulators for pio
  arm64: dts: mediatek: add audio support for mt8365-evk
  arm64: dts: mediatek: add afe support for mt8365 SoC
  arm64: dts: mediatek: mt8186-corsola: Disable DPI display interface
  arm64: dts: mediatek: mt8186: Add svs node
  arm64: dts: mediatek: mt8186: Add power domain for DPI
  arm64: dts: mediatek: mt8195: Correct clock order for dp_intf*
  arm64: dts: mt8183: add dpi node to mt8183
  arm64: dts: allwinner: h5: NanoPi Neo Plus2: Fix regulators
  arm64: dts: rockchip: add CAN0 and CAN1 interfaces to mecsbc board
  arm64: dts: rockchip: add CAN-FD controller nodes to rk3568
  arm64: dts: nuvoton: ma35d1: Add uart pinctrl settings
  arm64: dts: nuvoton: ma35d1: Add pinctrl and gpio nodes
  arm64: dts: nuvoton: Add syscon to the system-management node
  ARM: dts: Fix undocumented LM75 compatible nodes
  arm64: dts: toshiba: Fix pl011 and pl022 clocks
  ARM: dts: stm32: Use SAI to generate bit and frame clock on STM32MP15xx DHCOM PDK2
  ARM: dts: stm32: Switch bitclock/frame-master to flag on STM32MP15xx DHCOM PDK2
  ARM: dts: stm32: Sort properties in audio endpoints on STM32MP15xx DHCOM PDK2
  ARM: dts: stm32: Add MECIO1 and MECT1S board variants
  ...
2024-09-17 10:41:21 +02:00
Xingyu Wu
61f2e8a3a9 riscv: dts: starfive: jh7110-common: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz
CPUfreq supports 4 cpu frequency loads on 375/500/750/1500MHz.
But now PLL0 rate is 1GHz and the cpu frequency loads become
250/333/500/1000MHz in fact.

The PLL0 rate should be default set to 1.5GHz and set the
cpu_core rate to 500MHz in safe.

Fixes: e2c510d6d6 ("riscv: dts: starfive: Add cpu scaling for JH7110 SoC")
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-09-08 23:20:19 +01:00
Arnd Bergmann
8456010c95 RISC-V Devicetrees for v6.12
Sopgho:
 Added DMA controller for CV18XX.
 Added I2C, MMC, GPIO and onboard MCU (HWMON) for SG2042.
 Enable SDHCI0 for HuashanPi (using cv1812h).
 Some minor changes about dt-bindings for Sipeed LicheeRV Nano board
 (using SG2002, and SG2002 is the new codename of CV181xC).
 
 Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
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Merge tag 'riscv-sophgo-dt-for-6.12' of https://github.com/sophgo/linux into soc/dt

RISC-V Devicetrees for v6.12

Sopgho:
Added DMA controller for CV18XX.
Added I2C, MMC, GPIO and onboard MCU (HWMON) for SG2042.
Enable SDHCI0 for HuashanPi (using cv1812h).
Some minor changes about dt-bindings for Sipeed LicheeRV Nano board
(using SG2002, and SG2002 is the new codename of CV181xC).

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* tag 'riscv-sophgo-dt-for-6.12' of https://github.com/sophgo/linux:
  dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles
  dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic
  riscv: dts: sophgo: Add mcu device for Milk-V Pioneer
  riscv: sophgo: dts: add gpio controllers for SG2042 SoC
  riscv: sophgo: dts: add mmc controllers for SG2042 SoC
  riscv: dts: sophgo: Add i2c device support for sg2042
  riscv: dts: sophgo: Use common "interrupt-parent" for all peripherals for sg2042
  riscv: dts: sophgo: Add sdhci0 configuration for Huashan Pi
  riscv: dts: sophgo: cv18xx: add DMA controller

Link: https://lore.kernel.org/r/MA0P287MB28228F4FC59B057DF57D9A11FE9C2@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-05 10:16:25 +00:00
Lasse Collin
ab4ce9831a riscv: boot: add Image.xz support
The Image.* targets existed for other compressors already.  Bootloader
support is needed for decompression.

This is for CONFIG_EFI_ZBOOT=n. With CONFIG_EFI_ZBOOT=y, XZ was already
available.

Comparision with Linux 6.10 RV64GC tinyconfig (in KiB):

    1027 Image
     594 Image.gz
     541 Image.zst
     510 Image.lzma
     474 Image.xz

Link: https://lkml.kernel.org/r/20240721133633.47721-17-lasse.collin@tukaani.org
Signed-off-by: Lasse Collin <lasse.collin@tukaani.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Jules Maselbas <jmaselbas@zdiv.net>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Joel Stanley <joel@jms.id.au>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Jubin Zhong <zhongjubin@huawei.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Rui Li <me@lirui.org>
Cc: Sam James <sam@gentoo.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2024-09-01 20:43:27 -07:00
Inochi Amaoto
585dcb21cc riscv: dts: sophgo: Add mcu device for Milk-V Pioneer
Add mcu device and thermal zones node for Milk-V Pioneer.

Tested-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB4953C675C28B35723E87A36BBB822@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-09-02 08:35:13 +08:00
Chen Wang
a508d794f8 riscv: sophgo: dts: add gpio controllers for SG2042 SoC
Add support for the GPIO controller of Sophgo SG2042.

SG2042 uses IP from Synopsys DesignWare APB GPIO and has
three GPIO controllers.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/20240819080851.1954691-1-unicornxw@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-09-02 08:35:13 +08:00
Chen Wang
014b839f79 riscv: sophgo: dts: add mmc controllers for SG2042 SoC
SG2042 has two MMC controller, one for emmc, another for sd-card.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/03ac9ec9c23bbe4c3b30271e76537bdbe5638665.1722847198.git.unicorn_wang@outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-09-02 08:35:12 +08:00
Inochi Amaoto
c8eb04aecd riscv: dts: sophgo: Add i2c device support for sg2042
The i2c ip of sg2042 is a standard Synopsys i2c ip, which is already
supported by the mainline kernel.

Add i2c device node for sg2042.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Tested-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB49530E59974AF0FCA4FAB6DBBBB72@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-09-02 08:35:12 +08:00
Inochi Amaoto
5d9e6bc82b riscv: dts: sophgo: Use common "interrupt-parent" for all peripherals for sg2042
As all peripherals of sg2042 share the same "interrupt-parent",
there is no need to use peripherals specific "interrupt-parent".
Define "interrupt-parent" in the SoC level.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Tested-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB49531F6DFD2F116207C1397DBBB72@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-09-02 08:35:12 +08:00
Inochi Amaoto
63c33528b7 riscv: dts: sophgo: Add sdhci0 configuration for Huashan Pi
Add configuration for sdhci0 for Huashan Pi to support sd card.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB49538AC83C5DB314D10F7186BBA92@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-09-02 08:32:11 +08:00
Inochi Amaoto
514951a81a riscv: dts: sophgo: cv18xx: add DMA controller
Add DMA controller dt node for CV18XX/SG200x.

Link: https://lore.kernel.org/r/IA1PR20MB4953BD73E12B8A1CDBD9E1A3BB042@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-09-02 08:32:11 +08:00
Drew Fustini
2d98fea749 riscv: dts: thead: change TH1520 SPI node to use clock controller
Change the clock property in the TH1520 SPI controller node to a clock
provided by AP_SYS clock controller.

Remove spi_clk fixed clock reference from BeagleV Ahead and LPI4a dts.

Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-08-08 09:19:46 -07:00
Drew Fustini
7f5b28218c riscv: dts: thead: add clock to TH1520 gpio nodes
Add clock property to TH1520 gpio controller nodes. These clock gates
refer to corresponding enable bits in the peripheral clock gate control
register. Refer to register PERI_CLK_CFG in section 4.4.2.2.52 of the
TH1520 System User Manual.

Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-08-08 09:19:46 -07:00
Drew Fustini
89d58327fd riscv: dts: thead: update TH1520 dma and timer nodes to use clock controller
Change the dma-controller and timer nodes to use the APB clock provided
by the AP_SUBSYS clock controller.

Remove apb_clk reference from BeagleV Ahead and LPI4a dts.

Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-08-08 09:19:46 -07:00
Drew Fustini
03a20182e1 riscv: dts: thead: change TH1520 mmc nodes to use clock controller
Change the clock property in the TH1520 mmc controller nodes to a clock
provided by AP_SYS clock controller.

Remove sdhci fixed clock reference from BeagleV Ahead and LPI4a dts.

Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-08-08 09:19:45 -07:00
Drew Fustini
c101b4a028 riscv: dts: thead: change TH1520 uart nodes to use clock controller
Change the clock property in TH1520 uart nodes to a clock provided by
AP_SUBSYS clock controller.

Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-08-08 09:19:45 -07:00
Drew Fustini
e919fe036a riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller
Add node for the AP_SUBSYS clock controller on the T-Head TH1520 SoC.

Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf
Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-08-08 09:19:45 -07:00
Kanak Shilledar
32121e1584 riscv: dts: thead: add basic spi node
created spi0 node with fixed clock. the spi0 node
uses synopsis designware driver and has the following
compatible "snps,dw-apb-ssi". the spi0 node is connected
to a SPI NOR flash pad which is left unpopulated on the back
side of the board.

Acked-by: Drew Fustini <drew@pdp7.com>
Signed-off-by: Kanak Shilledar <kanakshilledar@gmail.com>
Signed-off-by: Drew Fustini <drew@pdp7.com>
2024-07-31 17:27:00 -07:00
Linus Torvalds
c9f33436d8 RISC-V Patches for the 6.11 Merge Window, Part 2
* Support for NUMA (via SRAT and SLIT), console output (via SPCR), and
   cache info (via PPTT) on ACPI-based systems.
 * The trap entry/exit code no longer breaks the return address stack
   predictor on many systems, which results in an improvement to trap
   latency.
 * Support for HAVE_ARCH_STACKLEAK.
 * The sv39 linear map has been extended to support 128GiB mappings.
 * The frequency of the mtime CSR is now visible via hwprobe.
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Merge tag 'riscv-for-linus-6.11-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull more RISC-V updates from Palmer Dabbelt:

 - Support for NUMA (via SRAT and SLIT), console output (via SPCR), and
   cache info (via PPTT) on ACPI-based systems.

 - The trap entry/exit code no longer breaks the return address stack
   predictor on many systems, which results in an improvement to trap
   latency.

 - Support for HAVE_ARCH_STACKLEAK.

 - The sv39 linear map has been extended to support 128GiB mappings.

 - The frequency of the mtime CSR is now visible via hwprobe.

* tag 'riscv-for-linus-6.11-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (21 commits)
  RISC-V: Provide the frequency of time CSR via hwprobe
  riscv: Extend sv39 linear mapping max size to 128G
  riscv: enable HAVE_ARCH_STACKLEAK
  riscv: signal: Remove unlikely() from WARN_ON() condition
  riscv: Improve exception and system call latency
  RISC-V: Select ACPI PPTT drivers
  riscv: cacheinfo: initialize cacheinfo's level and type from ACPI PPTT
  riscv: cacheinfo: remove the useless input parameter (node) of ci_leaf_init()
  RISC-V: ACPI: Enable SPCR table for console output on RISC-V
  riscv: boot: remove duplicated targets line
  trace: riscv: Remove deprecated kprobe on ftrace support
  riscv: cpufeature: Extract common elements from extension checking
  riscv: Introduce vendor variants of extension helpers
  riscv: Add vendor extensions to /proc/cpuinfo
  riscv: Extend cpufeature.c to detect vendor extensions
  RISC-V: run savedefconfig for defconfig
  RISC-V: hwprobe: sort EXT_KEY()s in hwprobe_isa_ext0() alphabetically
  ACPI: NUMA: replace pr_info with pr_debug in arch_acpi_numa_init
  ACPI: NUMA: change the ACPI_NUMA to a hidden option
  ACPI: NUMA: Add handler for SRAT RINTC affinity structure
  ...
2024-07-27 10:14:34 -07:00