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riscv: dts: sophgo: Add initial SG2002 SoC device tree

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Add initial device tree for the SG2002 RISC-V SoC by SOPHGO.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/r/20241010-sg2002-v5-1-a0f2e582b932@bootlin.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
This commit is contained in:
Thomas Bonnefille 2024-10-10 17:07:06 +02:00 • committed by Inochi Amaoto
parent 30003e3f80
commit 93b61555f5
1 changed files with 42 additions and 0 deletions
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arch/riscv/boot/dts/sophgo/sg2002.dtsi Normal file
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/pinctrl-sg2002.h>
#include "cv18xx.dtsi"
/ {
compatible = "sophgo,sg2002";
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};
soc {
pinctrl: pinctrl@3008000 {
compatible = "sophgo,sg2002-pinctrl";
reg = <0x03001000 0x1000>,
<0x05027000 0x1000>;
reg-names = "sys", "rtc";
};
};
};
&plic {
compatible = "sophgo,sg2002-plic", "thead,c900-plic";
};
&clint {
compatible = "sophgo,sg2002-clint", "thead,c900-clint";
};
&clk {
compatible = "sophgo,sg2000-clk";
};
&sdhci0 {
compatible = "sophgo,sg2002-dwcmshc";
};