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17 lines
461 B
C
17 lines
461 B
C
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_IPQ5018_CMN_PLL_H
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#define _DT_BINDINGS_CLK_QCOM_IPQ5018_CMN_PLL_H
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/* CMN PLL core clock. */
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#define IPQ5018_CMN_PLL_CLK 0
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/* The output clocks from CMN PLL of IPQ5018. */
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#define IPQ5018_XO_24MHZ_CLK 1
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#define IPQ5018_SLEEP_32KHZ_CLK 2
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#define IPQ5018_ETH_50MHZ_CLK 3
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#endif
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