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linux/arch/riscv/kernel
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Guo Ren fea2fed201
riscv: Enable per-task stack canaries 
This enables the use of per-task stack canary values if GCC has
support for emitting the stack canary reference relative to the
value of tp, which holds the task struct pointer in the riscv
kernel.

After compare arm64 and x86 implementations, seems arm64's is more
flexible and readable. The key point is how gcc get the offset of
stack_canary from gs/el0_sp.

x86: Use a fix offset from gs, not flexible.

struct fixed_percpu_data {
	/*
	 * GCC hardcodes the stack canary as %gs:40.  Since the
	 * irq_stack is the object at %gs:0, we reserve the bottom
	 * 48 bytes of the irq stack for the canary.
	 */
	char            gs_base[40]; // :(
	unsigned long   stack_canary;
};

arm64: Use -mstack-protector-guard-offset & guard-reg
	gcc options:
	-mstack-protector-guard=sysreg
	-mstack-protector-guard-reg=sp_el0
	-mstack-protector-guard-offset=xxx

riscv: Use -mstack-protector-guard-offset & guard-reg
	gcc options:
	-mstack-protector-guard=tls
	-mstack-protector-guard-reg=tp
	-mstack-protector-guard-offset=xxx

 GCC's implementation has been merged:
 commit c931e8d5a96463427040b0d11f9c4352ac22b2b0
 Author: Cooper Qu <cooper.qu@linux.alibaba.com>
 Date:   Mon Jul 13 16:15:08 2020 +0800

     RISC-V: Add support for TLS stack protector canary access

In the end, these codes are inserted by gcc before return:

*  0xffffffe00020b396 <+120>:   ld      a5,1008(tp) # 0x3f0
*  0xffffffe00020b39a <+124>:   xor     a5,a5,a4
*  0xffffffe00020b39c <+126>:   mv      a0,s5
*  0xffffffe00020b39e <+128>:   bnez    a5,0xffffffe00020b61c <_do_fork+766>
   0xffffffe00020b3a2 <+132>:   ld      ra,136(sp)
   0xffffffe00020b3a4 <+134>:   ld      s0,128(sp)
   0xffffffe00020b3a6 <+136>:   ld      s1,120(sp)
   0xffffffe00020b3a8 <+138>:   ld      s2,112(sp)
   0xffffffe00020b3aa <+140>:   ld      s3,104(sp)
   0xffffffe00020b3ac <+142>:   ld      s4,96(sp)
   0xffffffe00020b3ae <+144>:   ld      s5,88(sp)
   0xffffffe00020b3b0 <+146>:   ld      s6,80(sp)
   0xffffffe00020b3b2 <+148>:   ld      s7,72(sp)
   0xffffffe00020b3b4 <+150>:   addi    sp,sp,144
   0xffffffe00020b3b6 <+152>:   ret
   ...
*  0xffffffe00020b61c <+766>:   auipc   ra,0x7f8
*  0xffffffe00020b620 <+770>:   jalr    -1764(ra) # 0xffffffe000a02f38 <__stack_chk_fail>

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Cooper Qu <cooper.qu@linux.alibaba.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-01-14 15:09:10 -08:00
..
probes riscv: Add uprobes supported 2021-01-14 15:09:08 -08:00
vdso riscv: Explicitly specify the build id style in vDSO Makefile again 2020-11-25 09:44:14 -08:00
.gitignore .gitignore: add SPDX License Identifier 2020-03-25 11:50:48 +01:00
asm-offsets.c riscv: Enable per-task stack canaries 2021-01-14 15:09:10 -08:00
cacheinfo.c riscv: Add cache information in AUX vector 2020-09-15 18:46:08 -07:00
cpu-hotplug.c RISC-V: Support cpu hotplug 2020-03-31 11:28:30 -07:00
cpu.c RISC-V: Rename and move plic_find_hart_id() to arch directory 2020-06-09 19:11:20 -07:00
cpu_ops.c treewide: Convert macro and uses of __section(foo) to __section("foo") 2020-10-25 14:51:49 -07:00
cpu_ops_sbi.c RISC-V: Support cpu hotplug 2020-03-31 11:28:30 -07:00
cpu_ops_spinwait.c RISC-V: Add cpu_ops and modify default booting method 2020-03-31 11:25:56 -07:00
cpufeature.c RISC-V: Add bitmap reprensenting ISA features common across CPUs 2020-05-04 14:08:59 -07:00
efi-header.S RISC-V: Add PE/COFF header for EFI stub 2020-10-02 14:31:16 -07:00
efi.c RISC-V: Add EFI runtime services 2020-10-02 14:31:28 -07:00
entry.S riscv: Cleanup unnecessary define in asm-offset.c 2020-07-30 11:37:44 -07:00
fpu.S riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
ftrace.c riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT 2021-01-14 15:09:05 -08:00
head.h RISC-V: Move DT mapping outof fixmap 2020-10-02 14:30:57 -07:00
head.S RISC-V Patches for the 5.11 Merge Window, Part 1 2020-12-18 10:43:07 -08:00
image-vars.h RISC-V: Add PE/COFF header for EFI stub 2020-10-02 14:31:16 -07:00
irq.c RISC-V: Remove do_IRQ() function 2020-06-09 19:11:24 -07:00
jump_label.c riscv: Add jump-label implementation 2020-07-30 11:37:43 -07:00
kgdb.c riscv: Fix "no previous prototype" compile warning in kgdb.c file 2020-07-09 20:09:30 -07:00
Makefile riscv: Add kprobes supported 2021-01-14 15:09:06 -08:00
mcount-dyn.S riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT 2021-01-14 15:09:05 -08:00
mcount.S RISC-V: remove the unused return_to_handler export 2018-10-22 17:38:12 -07:00
module-sections.c riscv: add missing header file includes 2019-10-28 00:46:01 -07:00
module.c riscv: Support R_RISCV_ADD64 and R_RISCV_SUB64 relocs 2020-07-30 11:37:41 -07:00
patch.c riscv: Fixup compile error BUILD_BUG_ON failed 2021-01-14 15:09:01 -08:00
perf_callchain.c riscv: Make stack walk callback consistent with generic code 2020-11-20 18:53:38 -08:00
perf_event.c riscv: perf_event: Make some funciton static 2020-05-11 13:48:19 -07:00
perf_regs.c perf/arch: Remove perf_sample_data::regs_user_copy 2020-11-09 18:12:34 +01:00
process.c riscv: Enable per-task stack canaries 2021-01-14 15:09:10 -08:00
ptrace.c RISC-V: Implement ptrace regs and stack API 2021-01-14 15:09:01 -08:00
reset.c riscv: cleanup the default power off implementation 2019-11-13 13:22:52 -08:00
riscv_ksyms.c riscv: provide memmove implementation 2020-12-10 17:27:54 -08:00
sbi.c riscv: Cleanup sbi function stubs when RISCV_SBI disabled 2021-01-07 17:19:17 -08:00
setup.c riscv: Add machine name to kernel boot log and stack dump output 2021-01-14 15:08:59 -08:00
signal.c riscv: Add uprobes supported 2021-01-14 15:09:08 -08:00
smp.c RISC-V: Remove CLINT related code from timer and arch 2020-08-20 10:58:13 -07:00
smpboot.c riscv: Add numa support for riscv64 platform 2021-01-14 15:08:58 -08:00
soc.c riscv: Fix builtin DTB handling 2021-01-07 19:00:50 -08:00
stacktrace.c riscv: Enable ARCH_STACKWALK 2020-11-25 16:03:59 -08:00
sys_riscv.c RISC-V: Don't allow write+exec only page mapping request in mmap 2020-06-18 17:28:53 -07:00
syscall_table.c riscv: add missing header file includes 2019-10-28 00:46:01 -07:00
time.c riscv: use vDSO common flow to reduce the latency of the time-related functions 2020-06-10 19:47:16 -07:00
traps.c riscv: Add uprobes supported 2021-01-14 15:09:08 -08:00
traps_misaligned.c riscv: Unaligned load/store handling for M_MODE 2020-04-03 10:45:33 -07:00
vdso.c RISC-V Patches for the 5.8 Merge Window, Part 2 2020-06-11 12:55:20 -07:00
vmlinux.lds.S RISC-V: Move dynamic relocation section under __init 2020-11-25 16:05:29 -08:00