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![]() To improve the performance, We add some initial setting for smi larbs. there are two part: 1), Each port has the special ostd(outstanding) value in each larb. 2), Two general settings for each larb. a. THRT_UPDATE: the value in bits[7:4] of 0x24 is not so good. The HW default is 4, and we expect it is 5, thus, add a flag to update it. This is only a DE recommendatory value, not a actual issue. The register name(THRT_CON) means: throttling control, and the field RD_NU_LMT means: Read Non-ultra commands limit. This change means update the Read non-ultra command from 4 to 5 here. b. SW_FLAG: Set 1 to the FLAG register. this is only for helping debug. We could confirm if the larb is reset from this value is 1 or 0. In some SoC, this setting maybe changed dynamically for some special case like 4K, and this initial setting is enough in mt8195. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Link: https://lore.kernel.org/r/20210914113703.31466-13-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
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.. | ||
samsung | ||
tegra | ||
.gitignore | ||
atmel-ebi.c | ||
atmel-sdramc.c | ||
brcmstb_dpfe.c | ||
bt1-l2-ctl.c | ||
da8xx-ddrctl.c | ||
dfl-emif.c | ||
emif-asm-offsets.c | ||
emif.c | ||
emif.h | ||
fsl-corenet-cf.c | ||
fsl_ifc.c | ||
jedec_ddr.h | ||
jedec_ddr_data.c | ||
jz4780-nemc.c | ||
Kconfig | ||
Makefile | ||
mtk-smi.c | ||
mvebu-devbus.c | ||
of_memory.c | ||
of_memory.h | ||
omap-gpmc.c | ||
pl172.c | ||
pl353-smc.c | ||
renesas-rpc-if.c | ||
stm32-fmc2-ebi.c | ||
ti-aemif.c | ||
ti-emif-pm.c | ||
ti-emif-sram-pm.S |