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synced 2025-09-18 22:14:16 +00:00

When DMA/MSI cookies were made first-class citizens back in commit
46983fcd67
("iommu: Pull IOVA cookie management into the core"), there
was no real need to further expose the two different cookie types.
However, now that IOMMUFD wants to add a third type of MSI-mapping
cookie, we do have a nicely compelling reason to properly dismabiguate
things at the domain level beyond just vaguely guessing from the domain
type.
Meanwhile, we also effectively have another "cookie" in the form of the
anonymous union for other user data, which isn't much better in terms of
being vague and unenforced. The fact is that all these cookie types are
mutually exclusive, in the sense that combining them makes zero sense
and/or would be catastrophic (iommu_set_fault_handler() on an SVA
domain, anyone?) - the only combination which *might* be reasonable is
perhaps a fault handler and an MSI cookie, but nobody's doing that at
the moment, so let's rule it out as well for the sake of being clear and
robust. To that end, we pull DMA and MSI cookies apart a little more,
mostly to clear up the ambiguity at domain teardown, then for clarity
(and to save a little space), move them into the union, whose ownership
we can then properly describe and enforce entirely unambiguously.
[nicolinc: rebase on latest tree; use prefix IOMMU_COOKIE_; merge unions
in iommu_domain; add IOMMU_COOKIE_IOMMUFD for iommufd_hwpt]
Link: https://patch.msgid.link/r/1ace9076c95204bbe193ee77499d395f15f44b23.1742871535.git.nicolinc@nvidia.com
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
320 lines
8 KiB
C
320 lines
8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Helpers for IOMMU drivers implementing SVA
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*/
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#include <linux/mmu_context.h>
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#include <linux/mutex.h>
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#include <linux/sched/mm.h>
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#include <linux/iommu.h>
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#include "iommu-priv.h"
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static DEFINE_MUTEX(iommu_sva_lock);
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static struct iommu_domain *iommu_sva_domain_alloc(struct device *dev,
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struct mm_struct *mm);
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/* Allocate a PASID for the mm within range (inclusive) */
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static struct iommu_mm_data *iommu_alloc_mm_data(struct mm_struct *mm, struct device *dev)
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{
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struct iommu_mm_data *iommu_mm;
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ioasid_t pasid;
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lockdep_assert_held(&iommu_sva_lock);
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if (!arch_pgtable_dma_compat(mm))
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return ERR_PTR(-EBUSY);
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iommu_mm = mm->iommu_mm;
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/* Is a PASID already associated with this mm? */
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if (iommu_mm) {
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if (iommu_mm->pasid >= dev->iommu->max_pasids)
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return ERR_PTR(-EOVERFLOW);
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return iommu_mm;
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}
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iommu_mm = kzalloc(sizeof(struct iommu_mm_data), GFP_KERNEL);
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if (!iommu_mm)
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return ERR_PTR(-ENOMEM);
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pasid = iommu_alloc_global_pasid(dev);
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if (pasid == IOMMU_PASID_INVALID) {
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kfree(iommu_mm);
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return ERR_PTR(-ENOSPC);
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}
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iommu_mm->pasid = pasid;
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INIT_LIST_HEAD(&iommu_mm->sva_domains);
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/*
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* Make sure the write to mm->iommu_mm is not reordered in front of
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* initialization to iommu_mm fields. If it does, readers may see a
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* valid iommu_mm with uninitialized values.
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*/
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smp_store_release(&mm->iommu_mm, iommu_mm);
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return iommu_mm;
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}
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/**
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* iommu_sva_bind_device() - Bind a process address space to a device
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* @dev: the device
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* @mm: the mm to bind, caller must hold a reference to mm_users
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*
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* Create a bond between device and address space, allowing the device to
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* access the mm using the PASID returned by iommu_sva_get_pasid(). If a
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* bond already exists between @device and @mm, an additional internal
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* reference is taken. Caller must call iommu_sva_unbind_device()
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* to release each reference.
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*
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* iommu_dev_enable_feature(dev, IOMMU_DEV_FEAT_SVA) must be called first, to
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* initialize the required SVA features.
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*
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* On error, returns an ERR_PTR value.
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*/
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struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm)
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{
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struct iommu_group *group = dev->iommu_group;
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struct iommu_attach_handle *attach_handle;
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struct iommu_mm_data *iommu_mm;
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struct iommu_domain *domain;
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struct iommu_sva *handle;
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int ret;
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if (!group)
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return ERR_PTR(-ENODEV);
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mutex_lock(&iommu_sva_lock);
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/* Allocate mm->pasid if necessary. */
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iommu_mm = iommu_alloc_mm_data(mm, dev);
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if (IS_ERR(iommu_mm)) {
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ret = PTR_ERR(iommu_mm);
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goto out_unlock;
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}
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/* A bond already exists, just take a reference`. */
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attach_handle = iommu_attach_handle_get(group, iommu_mm->pasid, IOMMU_DOMAIN_SVA);
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if (!IS_ERR(attach_handle)) {
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handle = container_of(attach_handle, struct iommu_sva, handle);
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if (attach_handle->domain->mm != mm) {
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ret = -EBUSY;
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goto out_unlock;
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}
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refcount_inc(&handle->users);
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mutex_unlock(&iommu_sva_lock);
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return handle;
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}
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if (PTR_ERR(attach_handle) != -ENOENT) {
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ret = PTR_ERR(attach_handle);
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goto out_unlock;
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}
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handle = kzalloc(sizeof(*handle), GFP_KERNEL);
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if (!handle) {
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ret = -ENOMEM;
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goto out_unlock;
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}
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/* Search for an existing domain. */
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list_for_each_entry(domain, &mm->iommu_mm->sva_domains, next) {
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ret = iommu_attach_device_pasid(domain, dev, iommu_mm->pasid,
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&handle->handle);
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if (!ret) {
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domain->users++;
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goto out;
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}
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}
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/* Allocate a new domain and set it on device pasid. */
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domain = iommu_sva_domain_alloc(dev, mm);
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if (IS_ERR(domain)) {
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ret = PTR_ERR(domain);
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goto out_free_handle;
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}
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ret = iommu_attach_device_pasid(domain, dev, iommu_mm->pasid,
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&handle->handle);
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if (ret)
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goto out_free_domain;
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domain->users = 1;
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list_add(&domain->next, &mm->iommu_mm->sva_domains);
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out:
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refcount_set(&handle->users, 1);
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mutex_unlock(&iommu_sva_lock);
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handle->dev = dev;
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return handle;
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out_free_domain:
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iommu_domain_free(domain);
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out_free_handle:
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kfree(handle);
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out_unlock:
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mutex_unlock(&iommu_sva_lock);
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return ERR_PTR(ret);
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}
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EXPORT_SYMBOL_GPL(iommu_sva_bind_device);
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/**
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* iommu_sva_unbind_device() - Remove a bond created with iommu_sva_bind_device
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* @handle: the handle returned by iommu_sva_bind_device()
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*
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* Put reference to a bond between device and address space. The device should
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* not be issuing any more transaction for this PASID. All outstanding page
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* requests for this PASID must have been flushed to the IOMMU.
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*/
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void iommu_sva_unbind_device(struct iommu_sva *handle)
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{
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struct iommu_domain *domain = handle->handle.domain;
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struct iommu_mm_data *iommu_mm = domain->mm->iommu_mm;
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struct device *dev = handle->dev;
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mutex_lock(&iommu_sva_lock);
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if (!refcount_dec_and_test(&handle->users)) {
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mutex_unlock(&iommu_sva_lock);
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return;
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}
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iommu_detach_device_pasid(domain, dev, iommu_mm->pasid);
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if (--domain->users == 0) {
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list_del(&domain->next);
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iommu_domain_free(domain);
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}
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mutex_unlock(&iommu_sva_lock);
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kfree(handle);
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}
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EXPORT_SYMBOL_GPL(iommu_sva_unbind_device);
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u32 iommu_sva_get_pasid(struct iommu_sva *handle)
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{
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struct iommu_domain *domain = handle->handle.domain;
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return mm_get_enqcmd_pasid(domain->mm);
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}
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EXPORT_SYMBOL_GPL(iommu_sva_get_pasid);
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void mm_pasid_drop(struct mm_struct *mm)
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{
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struct iommu_mm_data *iommu_mm = mm->iommu_mm;
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if (!iommu_mm)
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return;
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iommu_free_global_pasid(iommu_mm->pasid);
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kfree(iommu_mm);
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}
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/*
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* I/O page fault handler for SVA
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*/
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static enum iommu_page_response_code
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iommu_sva_handle_mm(struct iommu_fault *fault, struct mm_struct *mm)
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{
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vm_fault_t ret;
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struct vm_area_struct *vma;
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unsigned int access_flags = 0;
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unsigned int fault_flags = FAULT_FLAG_REMOTE;
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struct iommu_fault_page_request *prm = &fault->prm;
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enum iommu_page_response_code status = IOMMU_PAGE_RESP_INVALID;
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if (!(prm->flags & IOMMU_FAULT_PAGE_REQUEST_PASID_VALID))
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return status;
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if (!mmget_not_zero(mm))
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return status;
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mmap_read_lock(mm);
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vma = vma_lookup(mm, prm->addr);
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if (!vma)
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/* Unmapped area */
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goto out_put_mm;
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if (prm->perm & IOMMU_FAULT_PERM_READ)
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access_flags |= VM_READ;
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if (prm->perm & IOMMU_FAULT_PERM_WRITE) {
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access_flags |= VM_WRITE;
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fault_flags |= FAULT_FLAG_WRITE;
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}
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if (prm->perm & IOMMU_FAULT_PERM_EXEC) {
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access_flags |= VM_EXEC;
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fault_flags |= FAULT_FLAG_INSTRUCTION;
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}
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if (!(prm->perm & IOMMU_FAULT_PERM_PRIV))
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fault_flags |= FAULT_FLAG_USER;
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if (access_flags & ~vma->vm_flags)
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/* Access fault */
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goto out_put_mm;
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ret = handle_mm_fault(vma, prm->addr, fault_flags, NULL);
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status = ret & VM_FAULT_ERROR ? IOMMU_PAGE_RESP_INVALID :
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IOMMU_PAGE_RESP_SUCCESS;
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out_put_mm:
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mmap_read_unlock(mm);
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mmput(mm);
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return status;
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}
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static void iommu_sva_handle_iopf(struct work_struct *work)
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{
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struct iopf_fault *iopf;
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struct iopf_group *group;
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enum iommu_page_response_code status = IOMMU_PAGE_RESP_SUCCESS;
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group = container_of(work, struct iopf_group, work);
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list_for_each_entry(iopf, &group->faults, list) {
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/*
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* For the moment, errors are sticky: don't handle subsequent
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* faults in the group if there is an error.
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*/
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if (status != IOMMU_PAGE_RESP_SUCCESS)
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break;
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status = iommu_sva_handle_mm(&iopf->fault,
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group->attach_handle->domain->mm);
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}
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iopf_group_response(group, status);
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iopf_free_group(group);
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}
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static int iommu_sva_iopf_handler(struct iopf_group *group)
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{
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struct iommu_fault_param *fault_param = group->fault_param;
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INIT_WORK(&group->work, iommu_sva_handle_iopf);
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if (!queue_work(fault_param->queue->wq, &group->work))
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return -EBUSY;
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return 0;
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}
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static struct iommu_domain *iommu_sva_domain_alloc(struct device *dev,
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struct mm_struct *mm)
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{
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const struct iommu_ops *ops = dev_iommu_ops(dev);
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struct iommu_domain *domain;
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if (ops->domain_alloc_sva) {
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domain = ops->domain_alloc_sva(dev, mm);
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if (IS_ERR(domain))
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return domain;
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} else {
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domain = ops->domain_alloc(IOMMU_DOMAIN_SVA);
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if (!domain)
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return ERR_PTR(-ENOMEM);
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}
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domain->type = IOMMU_DOMAIN_SVA;
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domain->cookie_type = IOMMU_COOKIE_SVA;
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mmgrab(mm);
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domain->mm = mm;
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domain->owner = ops;
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domain->iopf_handler = iommu_sva_iopf_handler;
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return domain;
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}
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