Su Sung Chung fb2b1ea325 drm/amd/display: program v_update and v_ready with proper field ... [WHY] There are two different variables used to calculate v_update and v_ready, one for validation and the other for performance parameter calculation. Before the variable for validation was used which caused underflow on 1080edp with vsr enabled [HOW] program v_update and v_ready with the variables for performance parameter calculation Signed-off-by: Su Sung Chung <su.chung@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-09-26 21:09:06 -05:00
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hw	drm/amdgpu/display: add support for LVDS (v5)	2018-08-27 11:11:15 -05:00
bw_fixed.h	amdgpu/dc: allow inlining constant int to fixed a lot better.	2017-09-29 13:03:35 -04:00
clock_source.h	drm/amd/display: remove unused clk_src code	2018-09-10 22:42:55 -05:00
compressor.h	drm/amd/display: Initial prototype of FBC implementation	2017-09-26 18:15:56 -04:00
core_status.h	drm/amd/display: Add timing validation against dongle cap	2017-11-28 17:54:16 -05:00
core_types.h	drm/amd/display: Reorder resource_pool to put i2c with aux	2018-09-10 22:43:39 -05:00
custom_float.h
dc_link_ddc.h	drm/amd/display: Return aux replies directly to DRM	2018-07-13 14:48:36 -05:00
dc_link_dp.h	drm/amd/display: Retry link training again	2018-07-27 09:07:42 -05:00
dce_calcs.h	drm/amdgpu/display: remove VEGAM config option	2018-05-18 16:08:18 -05:00
dcn_calcs.h	drm/amd/display: program v_update and v_ready with proper field	2018-09-26 21:09:06 -05:00
hw_sequencer.h	drm/amd/display: Support reading hw state from debugfs file	2018-08-27 15:20:49 -05:00
link_hwss.h	drm/amd/display: add eDP 1.2+ polling for T7	2018-02-19 14:19:34 -05:00
reg_helper.h	drm/amd/display: generic indirect register access	2018-07-13 14:47:33 -05:00
resource.h	drm/amd/display: num of sw i2c/aux engines less than num of connectors	2018-09-10 22:43:18 -05:00