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linux/arch/riscv/boot/dts/microchip
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Conor Dooley fa52935abe riscv: dts: microchip: reduce the fic3 clock rate 
For the v2022.09 release of the reference design, the fic3 clock rate
been reduced from 62.5 MHz to 50 MHz as it allows timing to be closed
significantly more quickly by customers who chose to build the
reference design themselves.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2022-09-27 18:53:58 +01:00
..
Makefile riscv: dts: microchip: add the sundance polarberry 2022-06-01 15:28:29 -07:00
mpfs-icicle-kit-fabric.dtsi riscv: dts: microchip: reduce the fic3 clock rate 2022-09-27 18:53:58 +01:00
mpfs-icicle-kit.dts riscv: dts: microchip: add pci dma ranges for the icicle kit 2022-09-27 18:53:58 +01:00
mpfs-polarberry-fabric.dtsi riscv: dts: microchip: move the mpfs' pci node to -fabric.dtsi 2022-09-27 18:53:58 +01:00
mpfs-polarberry.dts riscv: dts: microchip: add the sundance polarberry 2022-06-01 15:28:29 -07:00
mpfs.dtsi riscv: dts: microchip: move the mpfs' pci node to -fabric.dtsi 2022-09-27 18:53:58 +01:00