Borislav Petkov f3e2a51f56 x86/microcode: Use native CPUID to tickle out microcode revision ... Intel supplies the microcode revision value in MSR 0x8b (IA32_BIOS_SIGN_ID) after CPUID(1) has been executed. Execute it each time before reading that MSR. It used to do sync_core() which did do CPUID but c198b121b1 ("x86/asm: Rewrite sync_core() to use IRET-to-self") changed the sync_core() implementation so we better make the microcode loading case explicit, as the SDM documents it. Reported-and-tested-by: Jun'ichi Nomura <j-nomura@ce.jp.nec.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: http://lkml.kernel.org/r/20170109114147.5082-3-bp@alien8.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>		2017-01-09 23:11:14 +01:00
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amd.c	x86/microcode/AMD: Use native_cpuid() in load_ucode_amd_bsp()	2016-12-19 10:46:20 +01:00
core.c	x86/microcode/AMD: Reload proper initrd start address	2016-12-21 10:50:04 +01:00
intel.c	x86/microcode: Use native CPUID to tickle out microcode revision	2017-01-09 23:11:14 +01:00
Makefile	x86/microcode/intel: Remove intel_lib.c	2016-10-25 12:28:59 +02:00