Victor Zhao f1688bd69e drm/amd/amdgpu:save psp ring wptr to avoid attack ... [Why] When some tools performing psp mailbox attack, the readback value of register can be a random value which may break psp. [How] Use a psp wptr cache machanism to aovid the change made by attack. v2: unify change and add detailed reason Signed-off-by: Victor Zhao <Victor.Zhao@amd.com> Signed-off-by: Jingwen Chen <Jingwen.Chen2@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-05-27 12:33:52 -04:00
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drm	drm/amd/amdgpu:save psp ring wptr to avoid attack	2021-05-27 12:33:52 -04:00
host1x	gpu: host1x: Add early init and late exit callbacks	2021-03-31 17:42:14 +02:00
ipu-v3	gpu: ipu-v3: Add Rec.709 limited range support to DP	2021-05-10 17:20:29 +02:00
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