mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-08-05 16:54:27 +00:00
724ba67515
The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
211 lines
4.1 KiB
Text
211 lines
4.1 KiB
Text
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
|
|
/*
|
|
* Copyright 2018-2022 TQ-Systems GmbH
|
|
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
|
|
*/
|
|
|
|
/*
|
|
* Common for
|
|
* - TQMa6ULx
|
|
* - TQMa6ULxL
|
|
* - TQMa6ULLx
|
|
* - TQMa6ULLxL
|
|
*/
|
|
|
|
/ {
|
|
memory@80000000 {
|
|
device_type = "memory";
|
|
reg = <0x80000000 0x10000000>;
|
|
};
|
|
};
|
|
|
|
&i2c4 {
|
|
clock-frequency = <100000>;
|
|
pinctrl-names = "default", "gpio";
|
|
pinctrl-0 = <&pinctrl_i2c4>;
|
|
pinctrl-1 = <&pinctrl_i2c4_recovery>;
|
|
scl-gpios = <&gpio1 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
sda-gpios = <&gpio1 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
status = "okay";
|
|
|
|
pfuze3000: pmic@8 {
|
|
compatible = "fsl,pfuze3000";
|
|
reg = <0x08>;
|
|
|
|
regulators {
|
|
reg_sw1a: sw1a {
|
|
regulator-min-microvolt = <700000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-ramp-delay = <6250>;
|
|
/* not used */
|
|
};
|
|
|
|
reg_sw1b_core: sw1b {
|
|
regulator-min-microvolt = <700000>;
|
|
regulator-max-microvolt = <1475000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-ramp-delay = <6250>;
|
|
};
|
|
|
|
reg_sw2: sw2 {
|
|
regulator-min-microvolt = <2500000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
reg_sw3_ddr: sw3 {
|
|
regulator-min-microvolt = <900000>;
|
|
regulator-max-microvolt = <1650000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_swbst: swbst {
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5150000>;
|
|
/* not used */
|
|
};
|
|
|
|
reg_snvs_3v0: vsnvs {
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_vrefddr: vrefddr {
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_vccsd: vccsd {
|
|
regulator-min-microvolt = <2850000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
reg_v33_3v3: v33 {
|
|
regulator-min-microvolt = <2850000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_vldo1_3v3: vldo1 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
/* not used */
|
|
};
|
|
|
|
reg_vldo2: vldo2 {
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <1550000>;
|
|
/* not used */
|
|
};
|
|
|
|
reg_vldo3: vldo3 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
/* not used */
|
|
};
|
|
|
|
reg_vldo4: vldo4 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
|
|
jc42_1a: eeprom-temperature@1a {
|
|
compatible = "nxp,se97b", "jedec,jc-42.4-temp";
|
|
reg = <0x1a>;
|
|
};
|
|
|
|
m24c64_50: eeprom@50 {
|
|
compatible = "atmel,24c64";
|
|
reg = <0x50>;
|
|
pagesize = <32>;
|
|
};
|
|
|
|
m24c02_52: eeprom@52 {
|
|
compatible = "nxp,se97b", "atmel,24c02";
|
|
reg = <0x52>;
|
|
pagesize = <16>;
|
|
read-only;
|
|
};
|
|
|
|
rtc0: rtc@68 {
|
|
compatible = "dallas,ds1339";
|
|
reg = <0x68>;
|
|
};
|
|
};
|
|
|
|
&gpio4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pmic>;
|
|
|
|
/*
|
|
* PMIC & temperature sensor IRQ
|
|
* Both do currently not use IRQ
|
|
* potentially dangerous if used on baseboard
|
|
*/
|
|
pmic-int-hog {
|
|
gpio-hog;
|
|
gpios = <24 0>;
|
|
input;
|
|
};
|
|
};
|
|
|
|
&qspi {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_qspi>;
|
|
status = "okay";
|
|
|
|
flash0: flash@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "jedec,spi-nor";
|
|
spi-max-frequency = <33000000>;
|
|
spi-rx-bus-width = <4>;
|
|
spi-tx-bus-width = <1>;
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
/* eMMC */
|
|
&usdhc2 {
|
|
pinctrl-names = "default", "state_100mhz" , "state_200mhz";
|
|
pinctrl-0 = <&pinctrl_usdhc2>;
|
|
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
|
|
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
|
|
|
|
bus-width = <8>;
|
|
disable-wp;
|
|
non-removable;
|
|
no-sdio;
|
|
no-sd;
|
|
status = "okay";
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl_i2c4: i2c4grp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_UART2_TX_DATA__I2C4_SCL 0x4001b8b0
|
|
MX6UL_PAD_UART2_RX_DATA__I2C4_SDA 0x4001b8b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c4_recovery: i2c4recoverygrp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x4001b8b0
|
|
MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21 0x4001b8b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_pmic: pmic {
|
|
fsl,pins = <
|
|
/* PMIC irq */
|
|
MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x1b099
|
|
>;
|
|
};
|
|
};
|