mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-08-05 16:54:27 +00:00
724ba67515
The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
386 lines
7.9 KiB
Text
386 lines
7.9 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1
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*
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* Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
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*
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* Author: Nicolas Ferre <nicolas.ferre@microcihp.com>
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* Author: Eugen Hristev <eugen.hristev@microcihp.com>
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*/
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#include "sama5d2.dtsi"
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#include "sama5d2-pinfunc.h"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/mfd/atmel-flexcom.h>
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#include <dt-bindings/pinctrl/at91.h>
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/ {
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model = "Microchip SAMA5D27 WLSOM1";
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compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
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aliases {
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i2c0 = &i2c0;
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};
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clocks {
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slow_xtal {
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clock-frequency = <32768>;
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};
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main_xtal {
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clock-frequency = <24000000>;
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};
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};
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wifi_pwrseq: wifi_pwrseq {
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compatible = "mmc-pwrseq-wilc1000";
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reset-gpios = <&pioA PIN_PA27 GPIO_ACTIVE_HIGH>;
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powerdown-gpios = <&pioA PIN_PA29 GPIO_ACTIVE_HIGH>;
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pinctrl-0 = <&pinctrl_wilc_pwrseq>;
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pinctrl-names = "default";
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};
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};
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&flx1 {
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atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
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uart6: serial@200 {
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pinctrl-0 = <&pinctrl_flx1_default>;
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pinctrl-names = "default";
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};
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};
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&i2c0 {
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pinctrl-0 = <&pinctrl_i2c0_default>;
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pinctrl-1 = <&pinctrl_i2c0_gpio>;
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pinctrl-names = "default", "gpio";
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sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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};
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&i2c1 {
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dmas = <0>, <0>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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sda-gpios = <&pioA PIN_PD19 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&pioA PIN_PD20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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mcp16502@5b {
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compatible = "microchip,mcp16502";
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reg = <0x5b>;
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status = "okay";
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lpm-gpios = <&pioBU 0 GPIO_ACTIVE_LOW>;
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regulators {
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vdd_3v3: VDD_IO {
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regulator-name = "VDD_IO";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-initial-mode = <2>;
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regulator-allowed-modes = <2>, <4>;
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regulator-always-on;
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regulator-state-standby {
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regulator-on-in-suspend;
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regulator-mode = <4>;
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};
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-mode = <4>;
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};
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};
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vddio_ddr: VDD_DDR {
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regulator-name = "VDD_DDR";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-initial-mode = <2>;
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regulator-allowed-modes = <2>, <4>;
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regulator-always-on;
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regulator-state-standby {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1200000>;
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regulator-changeable-in-suspend;
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regulator-mode = <4>;
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};
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1200000>;
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regulator-changeable-in-suspend;
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regulator-mode = <4>;
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};
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};
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vdd_core: VDD_CORE {
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regulator-name = "VDD_CORE";
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regulator-min-microvolt = <1250000>;
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regulator-max-microvolt = <1250000>;
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regulator-initial-mode = <2>;
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regulator-allowed-modes = <2>, <4>;
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regulator-always-on;
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regulator-state-standby {
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regulator-on-in-suspend;
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regulator-mode = <4>;
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};
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-mode = <4>;
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};
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};
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vdd_ddr: VDD_OTHER {
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regulator-name = "VDD_OTHER";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <2>;
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regulator-allowed-modes = <2>, <4>;
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regulator-always-on;
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regulator-state-standby {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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regulator-changeable-in-suspend;
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regulator-mode = <4>;
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};
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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regulator-changeable-in-suspend;
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regulator-mode = <4>;
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};
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};
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LDO1 {
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regulator-name = "LDO1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-state-standby {
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regulator-on-in-suspend;
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};
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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LDO2 {
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regulator-name = "LDO2";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-state-standby {
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regulator-on-in-suspend;
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};
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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};
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};
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&macb0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_macb0_default>;
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#address-cells = <1>;
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#size-cells = <0>;
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phy-mode = "rmii";
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ethernet-phy@0 {
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reg = <0x0>;
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interrupt-parent = <&pioA>;
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interrupts = <PIN_PB24 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_macb0_phy_irq>;
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};
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};
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&pmc {
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atmel,osc-bypass;
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};
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&qspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_qspi1_default>;
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status = "disabled";
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qspi1_flash: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <104000000>;
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spi-cs-setup-ns = <7>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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m25p,fast-read;
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status = "disabled";
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at91bootstrap@0 {
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label = "at91bootstrap";
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reg = <0x0 0x40000>;
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};
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bootloader@40000 {
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label = "bootloader";
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reg = <0x40000 0xc0000>;
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};
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bootloaderenvred@100000 {
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label = "bootloader env redundant";
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reg = <0x100000 0x40000>;
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};
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bootloaderenv@140000 {
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label = "bootloader env";
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reg = <0x140000 0x40000>;
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};
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dtb@180000 {
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label = "device tree";
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reg = <0x180000 0x80000>;
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};
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kernel@200000 {
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label = "kernel";
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reg = <0x200000 0x600000>;
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};
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};
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};
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&pioA {
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pinctrl_flx1_default: flx1_usart_default {
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pinmux = <PIN_PA24__FLEXCOM1_IO0>,
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<PIN_PA23__FLEXCOM1_IO1>,
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<PIN_PA25__FLEXCOM1_IO3>,
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<PIN_PA26__FLEXCOM1_IO4>;
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bias-disable;
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};
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pinctrl_i2c0_default: i2c0_default {
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pinmux = <PIN_PD21__TWD0>,
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<PIN_PD22__TWCK0>;
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bias-disable;
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};
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pinctrl_i2c0_gpio: i2c0_gpio {
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pinmux = <PIN_PD21__GPIO>,
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<PIN_PD22__GPIO>;
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bias-disable;
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};
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pinctrl_i2c1_default: i2c1_default {
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pinmux = <PIN_PD19__TWD1>,
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<PIN_PD20__TWCK1>;
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bias-disable;
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};
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pinctrl_i2c1_gpio: i2c1_gpio {
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pinmux = <PIN_PD19__GPIO>,
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<PIN_PD20__GPIO>;
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bias-disable;
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};
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pinctrl_macb0_default: macb0_default {
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pinmux = <PIN_PB14__GTXCK>,
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<PIN_PB15__GTXEN>,
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<PIN_PB16__GRXDV>,
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<PIN_PB17__GRXER>,
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<PIN_PB18__GRX0>,
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<PIN_PB19__GRX1>,
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<PIN_PB20__GTX0>,
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<PIN_PB21__GTX1>,
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<PIN_PB22__GMDC>,
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<PIN_PB23__GMDIO>;
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bias-disable;
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};
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pinctrl_macb0_phy_irq: macb0_phy_irq {
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pinmux = <PIN_PB24__GPIO>;
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bias-disable;
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};
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pinctrl_qspi1_default: qspi1_default {
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pinmux = <PIN_PB5__QSPI1_SCK>,
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<PIN_PB6__QSPI1_CS>,
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<PIN_PB7__QSPI1_IO0>,
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<PIN_PB8__QSPI1_IO1>,
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<PIN_PB9__QSPI1_IO2>,
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<PIN_PB10__QSPI1_IO3>;
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bias-pull-up;
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};
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pinctrl_sdmmc1_default: sdmmc1_default {
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cmd-data {
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pinmux = <PIN_PA28__SDMMC1_CMD>,
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<PIN_PA18__SDMMC1_DAT0>,
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<PIN_PA19__SDMMC1_DAT1>,
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<PIN_PA20__SDMMC1_DAT2>,
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<PIN_PA21__SDMMC1_DAT3>;
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bias-disable;
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};
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conf-ck {
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pinmux = <PIN_PA22__SDMMC1_CK>;
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bias-disable;
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};
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};
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pinctrl_wilc_default: wilc_default {
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conf-irq {
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pinmux = <PIN_PB25__GPIO>;
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bias-disable;
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};
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};
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pinctrl_wilc_pwrseq: wilc_pwrseq {
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conf-ce-nrst {
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pinmux = <PIN_PA27__GPIO>,
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<PIN_PA29__GPIO>;
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bias-disable;
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};
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conf-rtcclk {
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pinmux = <PIN_PB13__PCK1>;
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bias-disable;
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};
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};
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};
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&sdmmc1 {
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#address-cells = <1>;
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#size-cells = <0>;
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sdmmc1_default>;
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mmc-pwrseq = <&wifi_pwrseq>;
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no-1-8-v;
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non-removable;
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bus-width = <4>;
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status = "okay";
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wilc: wifi@0 {
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reg = <0>;
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compatible = "microchip,wilc1000";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wilc_default>;
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clocks = <&pmc PMC_TYPE_SYSTEM 9>;
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clock-names = "rtc";
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interrupts = <PIN_PB25 IRQ_TYPE_NONE>;
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interrupt-parent = <&pioA>;
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assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>;
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assigned-clock-rates = <32768>;
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};
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};
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