mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-08-04 00:06:36 +00:00
eee16b1471
This patch perform the compatibility check for the device after the chip detect is done. It is to prevent the mismatch between the device compatible specified in the device tree and actual device found during the detect. The ksz9477 device doesn't use any .data in the of_device_id. But the ksz8795_spi uses .data for assigning the regmap between 8830 family and 87xx family switch. Changed the regmap assignment based on the chip_id from the .data. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
382 lines
10 KiB
C
382 lines
10 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Microchip switch driver common header
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*
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* Copyright (C) 2017-2019 Microchip Technology Inc.
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*/
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#ifndef __KSZ_COMMON_H
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#define __KSZ_COMMON_H
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#include <linux/etherdevice.h>
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#include <linux/kernel.h>
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#include <linux/mutex.h>
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#include <linux/phy.h>
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#include <linux/regmap.h>
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#include <net/dsa.h>
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struct vlan_table {
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u32 table[3];
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};
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struct ksz_port_mib {
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struct mutex cnt_mutex; /* structure access */
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u8 cnt_ptr;
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u64 *counters;
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struct rtnl_link_stats64 stats64;
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struct spinlock stats64_lock;
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};
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struct ksz_chip_data {
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u32 chip_id;
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const char *dev_name;
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int num_vlans;
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int num_alus;
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int num_statics;
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int cpu_ports;
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int port_cnt;
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bool phy_errata_9477;
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bool ksz87xx_eee_link_erratum;
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};
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struct ksz_port {
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bool remove_tag; /* Remove Tag flag set, for ksz8795 only */
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int stp_state;
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struct phy_device phydev;
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u32 on:1; /* port is not disabled by hardware */
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u32 phy:1; /* port has a PHY */
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u32 fiber:1; /* port is fiber */
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u32 sgmii:1; /* port is SGMII */
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u32 force:1;
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u32 read:1; /* read MIB counters in background */
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u32 freeze:1; /* MIB counter freeze is enabled */
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struct ksz_port_mib mib;
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phy_interface_t interface;
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u16 max_frame;
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};
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struct ksz_device {
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struct dsa_switch *ds;
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struct ksz_platform_data *pdata;
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const char *name;
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const struct ksz_chip_data *info;
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struct mutex dev_mutex; /* device access */
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struct mutex regmap_mutex; /* regmap access */
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struct mutex alu_mutex; /* ALU access */
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struct mutex vlan_mutex; /* vlan access */
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const struct ksz_dev_ops *dev_ops;
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struct device *dev;
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struct regmap *regmap[3];
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void *priv;
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struct gpio_desc *reset_gpio; /* Optional reset GPIO */
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/* chip specific data */
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u32 chip_id;
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int cpu_port; /* port connected to CPU */
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int phy_port_cnt;
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u8 reg_mib_cnt;
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int mib_cnt;
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const struct mib_names *mib_names;
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phy_interface_t compat_interface;
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u32 regs_size;
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bool synclko_125;
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bool synclko_disable;
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struct vlan_table *vlan_cache;
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struct ksz_port *ports;
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struct delayed_work mib_read;
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unsigned long mib_read_interval;
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u16 mirror_rx;
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u16 mirror_tx;
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u32 features; /* chip specific features */
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u32 overrides; /* chip functions set by user */
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u16 host_mask;
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u16 port_mask;
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};
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/* List of supported models */
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enum ksz_model {
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KSZ8795,
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KSZ8794,
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KSZ8765,
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KSZ8830,
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KSZ9477,
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KSZ9897,
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KSZ9893,
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KSZ9567,
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LAN9370,
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LAN9371,
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LAN9372,
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LAN9373,
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LAN9374,
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};
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enum ksz_chip_id {
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KSZ8795_CHIP_ID = 0x8795,
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KSZ8794_CHIP_ID = 0x8794,
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KSZ8765_CHIP_ID = 0x8765,
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KSZ8830_CHIP_ID = 0x8830,
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KSZ9477_CHIP_ID = 0x00947700,
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KSZ9897_CHIP_ID = 0x00989700,
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KSZ9893_CHIP_ID = 0x00989300,
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KSZ9567_CHIP_ID = 0x00956700,
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LAN9370_CHIP_ID = 0x00937000,
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LAN9371_CHIP_ID = 0x00937100,
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LAN9372_CHIP_ID = 0x00937200,
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LAN9373_CHIP_ID = 0x00937300,
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LAN9374_CHIP_ID = 0x00937400,
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};
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struct alu_struct {
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/* entry 1 */
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u8 is_static:1;
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u8 is_src_filter:1;
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u8 is_dst_filter:1;
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u8 prio_age:3;
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u32 _reserv_0_1:23;
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u8 mstp:3;
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/* entry 2 */
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u8 is_override:1;
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u8 is_use_fid:1;
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u32 _reserv_1_1:23;
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u8 port_forward:7;
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/* entry 3 & 4*/
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u32 _reserv_2_1:9;
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u8 fid:7;
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u8 mac[ETH_ALEN];
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};
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struct ksz_dev_ops {
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u32 (*get_port_addr)(int port, int offset);
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void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
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void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
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void (*port_cleanup)(struct ksz_device *dev, int port);
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void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
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void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
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void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
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int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr,
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u8 *fid, u8 *src_port, u8 *timestamp,
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u16 *entries);
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int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr,
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struct alu_struct *alu);
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void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr,
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struct alu_struct *alu);
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void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
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u64 *cnt);
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void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
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u64 *dropped, u64 *cnt);
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void (*r_mib_stat64)(struct ksz_device *dev, int port);
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void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze);
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void (*port_init_cnt)(struct ksz_device *dev, int port);
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int (*shutdown)(struct ksz_device *dev);
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int (*detect)(struct ksz_device *dev);
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int (*init)(struct ksz_device *dev);
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void (*exit)(struct ksz_device *dev);
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};
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struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);
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int ksz_switch_register(struct ksz_device *dev,
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const struct ksz_dev_ops *ops);
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void ksz_switch_remove(struct ksz_device *dev);
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int ksz8_switch_register(struct ksz_device *dev);
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int ksz9477_switch_register(struct ksz_device *dev);
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void ksz_update_port_member(struct ksz_device *dev, int port);
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void ksz_init_mib_timer(struct ksz_device *dev);
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void ksz_r_mib_stats64(struct ksz_device *dev, int port);
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void ksz_get_stats64(struct dsa_switch *ds, int port,
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struct rtnl_link_stats64 *s);
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extern const struct ksz_chip_data ksz_switch_chips[];
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/* Common DSA access functions */
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int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg);
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int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val);
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void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode,
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phy_interface_t interface);
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int ksz_sset_count(struct dsa_switch *ds, int port, int sset);
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void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf);
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int ksz_port_bridge_join(struct dsa_switch *ds, int port,
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struct dsa_bridge bridge, bool *tx_fwd_offload,
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struct netlink_ext_ack *extack);
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void ksz_port_bridge_leave(struct dsa_switch *ds, int port,
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struct dsa_bridge bridge);
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void ksz_port_stp_state_set(struct dsa_switch *ds, int port,
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u8 state, int reg);
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void ksz_port_fast_age(struct dsa_switch *ds, int port);
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int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb,
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void *data);
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int ksz_port_mdb_add(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_mdb *mdb,
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struct dsa_db db);
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int ksz_port_mdb_del(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_mdb *mdb,
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struct dsa_db db);
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int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy);
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/* Common register access functions */
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static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
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{
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unsigned int value;
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int ret = regmap_read(dev->regmap[0], reg, &value);
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*val = value;
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return ret;
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}
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static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
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{
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unsigned int value;
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int ret = regmap_read(dev->regmap[1], reg, &value);
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*val = value;
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return ret;
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}
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static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
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{
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unsigned int value;
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int ret = regmap_read(dev->regmap[2], reg, &value);
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*val = value;
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return ret;
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}
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static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val)
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{
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u32 value[2];
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int ret;
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ret = regmap_bulk_read(dev->regmap[2], reg, value, 2);
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if (!ret)
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*val = (u64)value[0] << 32 | value[1];
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return ret;
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}
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static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
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{
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return regmap_write(dev->regmap[0], reg, value);
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}
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static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
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{
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return regmap_write(dev->regmap[1], reg, value);
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}
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static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
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{
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return regmap_write(dev->regmap[2], reg, value);
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}
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static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value)
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{
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u32 val[2];
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/* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
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value = swab64(value);
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val[0] = swab32(value & 0xffffffffULL);
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val[1] = swab32(value >> 32ULL);
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return regmap_bulk_write(dev->regmap[2], reg, val, 2);
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}
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static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
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u8 *data)
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{
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ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data);
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}
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static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
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u16 *data)
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{
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ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data);
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}
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static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
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u32 *data)
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{
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ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data);
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}
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static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
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u8 data)
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{
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ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
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}
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static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
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u16 data)
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{
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ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data);
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}
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static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
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u32 data)
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{
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ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data);
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}
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static inline void ksz_regmap_lock(void *__mtx)
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{
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struct mutex *mtx = __mtx;
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mutex_lock(mtx);
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}
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static inline void ksz_regmap_unlock(void *__mtx)
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{
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struct mutex *mtx = __mtx;
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mutex_unlock(mtx);
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}
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/* STP State Defines */
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#define PORT_TX_ENABLE BIT(2)
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#define PORT_RX_ENABLE BIT(1)
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#define PORT_LEARN_DISABLE BIT(0)
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/* Regmap tables generation */
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#define KSZ_SPI_OP_RD 3
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#define KSZ_SPI_OP_WR 2
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#define swabnot_used(x) 0
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#define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \
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swab##swp((opcode) << ((regbits) + (regpad)))
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#define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \
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{ \
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.name = #width, \
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.val_bits = (width), \
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.reg_stride = 1, \
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.reg_bits = (regbits) + (regalign), \
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.pad_bits = (regpad), \
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.max_register = BIT(regbits) - 1, \
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.cache_type = REGCACHE_NONE, \
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.read_flag_mask = \
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KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \
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regbits, regpad), \
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.write_flag_mask = \
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KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \
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regbits, regpad), \
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.lock = ksz_regmap_lock, \
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.unlock = ksz_regmap_unlock, \
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.reg_format_endian = REGMAP_ENDIAN_BIG, \
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.val_format_endian = REGMAP_ENDIAN_BIG \
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}
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#define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \
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static const struct regmap_config ksz##_regmap_config[] = { \
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KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \
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KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \
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KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \
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}
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#endif
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