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e7fd28a706
The one obvious thing SH and ARM want is a sensible default for tlb_start_vma(). (also: https://lkml.org/lkml/2004/1/15/6 ) Avoid all VIPT architectures providing their own tlb_start_vma() implementation and rely on architectures to provide a no-op flush_cache_range() when it is not relevant. This patch makes tlb_start_vma() default to flush_cache_range(), which should be right and sufficient. The only exceptions that I found where (oddly): - m68k-mmu - sparc64 - unicore Those architectures appear to have flush_cache_range(), but their current tlb_start_vma() does not call it. No change in behavior intended. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: David Miller <davem@davemloft.net> Cc: Guan Xuetao <gxt@pku.edu.cn> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Nick Piggin <npiggin@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@surriel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> |
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| .. | ||
| asm-macros.h | ||
| asm-offsets.h | ||
| cache.h | ||
| cacheflush.h | ||
| checksum.h | ||
| cpuinfo.h | ||
| delay.h | ||
| elf.h | ||
| entry.h | ||
| io.h | ||
| irq.h | ||
| irqflags.h | ||
| Kbuild | ||
| kgdb.h | ||
| linkage.h | ||
| mmu.h | ||
| mmu_context.h | ||
| page.h | ||
| pgalloc.h | ||
| pgtable-bits.h | ||
| pgtable.h | ||
| processor.h | ||
| ptrace.h | ||
| registers.h | ||
| setup.h | ||
| shmparam.h | ||
| string.h | ||
| switch_to.h | ||
| syscall.h | ||
| syscalls.h | ||
| thread_info.h | ||
| timex.h | ||
| tlb.h | ||
| tlbflush.h | ||
| traps.h | ||
| uaccess.h | ||