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e72bba2135
While it was convenient to have a generic ring structure that served both Tx and Rx sides, next commits are going to introduce several Tx-specific fields, so in order to avoid hurting the Rx side, let's pull out the Tx ring onto new ice_tx_ring and ice_rx_ring structs. Rx ring could be handled by the old ice_ring which would reduce the code churn within this patch, but this would make things asymmetric. Make the union out of the ring container within ice_q_vector so that it is possible to iterate over newly introduced ice_tx_ring. Remove the @size as it's only accessed from control path and it can be calculated pretty easily. Change definitions of ice_update_ring_stats and ice_fetch_u64_stats_per_ring so that they are ring agnostic and can be used for both Rx and Tx rings. Sizes of Rx and Tx ring structs are 256 and 192 bytes, respectively. In Rx ring xdp_rxq_info occupies its own cacheline, so it's the major difference now. Signed-off-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com> Tested-by: Gurucharan G <gurucharanx.g@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
59 lines
2 KiB
C
59 lines
2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2019, Intel Corporation. */
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#ifndef _ICE_TXRX_LIB_H_
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#define _ICE_TXRX_LIB_H_
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#include "ice.h"
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/**
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* ice_test_staterr - tests bits in Rx descriptor status and error fields
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* @rx_desc: pointer to receive descriptor (in le64 format)
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* @stat_err_bits: value to mask
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*
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* This function does some fast chicanery in order to return the
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* value of the mask which is really only used for boolean tests.
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* The status_error_len doesn't need to be shifted because it begins
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* at offset zero.
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*/
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static inline bool
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ice_test_staterr(union ice_32b_rx_flex_desc *rx_desc, const u16 stat_err_bits)
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{
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return !!(rx_desc->wb.status_error0 & cpu_to_le16(stat_err_bits));
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}
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static inline __le64
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ice_build_ctob(u64 td_cmd, u64 td_offset, unsigned int size, u64 td_tag)
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{
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return cpu_to_le64(ICE_TX_DESC_DTYPE_DATA |
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(td_cmd << ICE_TXD_QW1_CMD_S) |
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(td_offset << ICE_TXD_QW1_OFFSET_S) |
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((u64)size << ICE_TXD_QW1_TX_BUF_SZ_S) |
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(td_tag << ICE_TXD_QW1_L2TAG1_S));
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}
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/**
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* ice_xdp_ring_update_tail - Updates the XDP Tx ring tail register
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* @xdp_ring: XDP Tx ring
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*
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* This function updates the XDP Tx ring tail register.
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*/
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static inline void ice_xdp_ring_update_tail(struct ice_tx_ring *xdp_ring)
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{
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/* Force memory writes to complete before letting h/w
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* know there are new descriptors to fetch.
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*/
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wmb();
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writel_relaxed(xdp_ring->next_to_use, xdp_ring->tail);
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}
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void ice_finalize_xdp_rx(struct ice_rx_ring *xdp_ring, unsigned int xdp_res);
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int ice_xmit_xdp_buff(struct xdp_buff *xdp, struct ice_tx_ring *xdp_ring);
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int ice_xmit_xdp_ring(void *data, u16 size, struct ice_tx_ring *xdp_ring);
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void ice_release_rx_desc(struct ice_rx_ring *rx_ring, u16 val);
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void
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ice_process_skb_fields(struct ice_rx_ring *rx_ring,
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union ice_32b_rx_flex_desc *rx_desc,
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struct sk_buff *skb, u16 ptype);
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void
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ice_receive_skb(struct ice_rx_ring *rx_ring, struct sk_buff *skb, u16 vlan_tag);
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#endif /* !_ICE_TXRX_LIB_H_ */
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