Nicholas Kazlauskas e2f60fd8ba drm/amd/display: Add missing DCN30 registers and fields for OTG_CRC_CNTL2 ... [Why] When enabling the debugfs for CRC capture we hit assertions caused by register address and field masks and shifts missing. [How] We want these registers programmed, so add in the SRI/SF entries for this register. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-07-14 14:38:17 -04:00
..
amdgpu_dm	drm/amd/display: Reuse parsing code of debugfs write buffer	2020-07-14 14:37:52 -04:00
dc	drm/amd/display: Add missing DCN30 registers and fields for OTG_CRC_CNTL2	2020-07-14 14:38:17 -04:00
dmub	drm/amd/display: [FW Promotion] Release 0.0.24	2020-07-14 14:37:33 -04:00
include	drm/amd/display: Add logger for SMU msg	2020-07-08 09:02:31 -04:00
modules	drm/amd/display: Send VSIF on unsupported modes on DAL	2020-07-08 09:01:45 -04:00
Kconfig	drm/amd/display: Add DCN3 to Kconfig	2020-07-01 01:59:15 -04:00
Makefile
TODO