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e1378e5228
Now that AQL works well on all mt76 drivers, completely replace the arbitrary burst sizing and number of bursts logic for tx scheduling. For the short period of time in which AQL does not work well yet, limit each stations to 16 in-flight packets that have no estimated tx time. This should avoid filling the queue if a station connects and queues up a large number of packets before rate control information is available, especially with hardware rate control Signed-off-by: Felix Fietkau <nbd@nbd.name>
115 lines
2.8 KiB
C
115 lines
2.8 KiB
C
// SPDX-License-Identifier: ISC
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/*
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* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
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*/
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#include "mt76.h"
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static int
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mt76_reg_set(void *data, u64 val)
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{
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struct mt76_dev *dev = data;
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__mt76_wr(dev, dev->debugfs_reg, val);
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return 0;
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}
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static int
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mt76_reg_get(void *data, u64 *val)
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{
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struct mt76_dev *dev = data;
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*val = __mt76_rr(dev, dev->debugfs_reg);
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return 0;
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}
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DEFINE_DEBUGFS_ATTRIBUTE(fops_regval, mt76_reg_get, mt76_reg_set,
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"0x%08llx\n");
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int mt76_queues_read(struct seq_file *s, void *data)
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{
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struct mt76_dev *dev = dev_get_drvdata(s->private);
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int i;
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for (i = 0; i < ARRAY_SIZE(dev->q_tx); i++) {
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struct mt76_queue *q = dev->q_tx[i].q;
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if (!q)
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continue;
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seq_printf(s,
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"%d: queued=%d head=%d tail=%d\n",
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i, q->queued, q->head, q->tail);
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(mt76_queues_read);
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static int mt76_rx_queues_read(struct seq_file *s, void *data)
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{
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struct mt76_dev *dev = dev_get_drvdata(s->private);
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int i, queued;
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mt76_for_each_q_rx(dev, i) {
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struct mt76_queue *q = &dev->q_rx[i];
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queued = mt76_is_usb(dev) ? q->ndesc - q->queued : q->queued;
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seq_printf(s, "%d: queued=%d head=%d tail=%d\n",
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i, queued, q->head, q->tail);
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}
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return 0;
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}
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void mt76_seq_puts_array(struct seq_file *file, const char *str,
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s8 *val, int len)
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{
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int i;
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seq_printf(file, "%10s:", str);
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for (i = 0; i < len; i++)
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seq_printf(file, " %2d", val[i]);
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seq_puts(file, "\n");
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}
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EXPORT_SYMBOL_GPL(mt76_seq_puts_array);
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static int mt76_read_rate_txpower(struct seq_file *s, void *data)
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{
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struct mt76_dev *dev = dev_get_drvdata(s->private);
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mt76_seq_puts_array(s, "CCK", dev->rate_power.cck,
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ARRAY_SIZE(dev->rate_power.cck));
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mt76_seq_puts_array(s, "OFDM", dev->rate_power.ofdm,
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ARRAY_SIZE(dev->rate_power.ofdm));
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mt76_seq_puts_array(s, "STBC", dev->rate_power.stbc,
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ARRAY_SIZE(dev->rate_power.stbc));
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mt76_seq_puts_array(s, "HT", dev->rate_power.ht,
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ARRAY_SIZE(dev->rate_power.ht));
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mt76_seq_puts_array(s, "VHT", dev->rate_power.vht,
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ARRAY_SIZE(dev->rate_power.vht));
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return 0;
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}
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struct dentry *mt76_register_debugfs(struct mt76_dev *dev)
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{
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struct dentry *dir;
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dir = debugfs_create_dir("mt76", dev->hw->wiphy->debugfsdir);
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if (!dir)
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return NULL;
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debugfs_create_u8("led_pin", 0600, dir, &dev->led_pin);
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debugfs_create_u32("regidx", 0600, dir, &dev->debugfs_reg);
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debugfs_create_file_unsafe("regval", 0600, dir, dev,
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&fops_regval);
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debugfs_create_blob("eeprom", 0400, dir, &dev->eeprom);
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if (dev->otp.data)
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debugfs_create_blob("otp", 0400, dir, &dev->otp);
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debugfs_create_devm_seqfile(dev->dev, "rate_txpower", dir,
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mt76_read_rate_txpower);
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debugfs_create_devm_seqfile(dev->dev, "rx-queues", dir,
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mt76_rx_queues_read);
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return dir;
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}
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EXPORT_SYMBOL_GPL(mt76_register_debugfs);
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