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![]() Current code erroneously sets-up the CPU base address through the
parameter 'pci_addr', which is passed to initialize the CPU (AXI) base
address of the inbound window where the controller maps the PCI address
space into CPU physical address space; furthermore, it also truncates it
by programming only the lower 32-bit value into the inbound CPU address
register.
Fix both issues by introducing a new parameter 'u64 cpu_addr' to
initialize both lower 32-bit and upper 32-bit of the CPU physical
base address mapping PCI inbound transactions into CPU (AXI) ones.
Fixes:
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.. | ||
dwc | ||
Kconfig | ||
Makefile | ||
pci-aardvark.c | ||
pci-ftpci100.c | ||
pci-host-common.c | ||
pci-host-generic.c | ||
pci-hyperv.c | ||
pci-mvebu.c | ||
pci-rcar-gen2.c | ||
pci-tegra.c | ||
pci-thunder-ecam.c | ||
pci-thunder-pem.c | ||
pci-v3-semi.c | ||
pci-versatile.c | ||
pci-xgene-msi.c | ||
pci-xgene.c | ||
pcie-altera-msi.c | ||
pcie-altera.c | ||
pcie-cadence-ep.c | ||
pcie-cadence-host.c | ||
pcie-cadence.c | ||
pcie-cadence.h | ||
pcie-iproc-bcma.c | ||
pcie-iproc-msi.c | ||
pcie-iproc-platform.c | ||
pcie-iproc.c | ||
pcie-iproc.h | ||
pcie-mediatek.c | ||
pcie-mobiveil.c | ||
pcie-rcar.c | ||
pcie-rockchip-ep.c | ||
pcie-rockchip-host.c | ||
pcie-rockchip.c | ||
pcie-rockchip.h | ||
pcie-tango.c | ||
pcie-xilinx-nwl.c | ||
pcie-xilinx.c | ||
vmd.c |