Raviteja Narayanam dd66b39f60 i2c: cadence: Clear HOLD bit before xfer_size register rolls over ... On Xilinx zynq SOC if the delay between address register write and control register write in cdns_mrecv function is more, the xfer size register rolls over and controller is stuck. This is an IP bug and is resolved in later versions of IP. To avoid this scenario, disable the interrupts on the current processor core between the two register writes and enable them later. This can help achieve the timing constraint. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>		2021-06-23 18:17:08 +02:00
..
algos	i2c: algo: bit: use new macro to specifiy capabilities	2021-01-22 09:59:21 +01:00
busses	i2c: cadence: Clear HOLD bit before xfer_size register rolls over	2021-06-23 18:17:08 +02:00
muxes	i2c: mux: mlxcpld: Add callback to notify mux creation completion	2021-02-09 11:35:44 +01:00
i2c-boardinfo.c	i2c: Remove support for dangling device properties	2021-04-10 21:43:02 +02:00
i2c-core-acpi.c	i2c: core: Do not print duplicate error when failing to register an i2c-client from ACPI	2021-01-05 10:59:11 +01:00
i2c-core-base.c	i2c: core: support bus regulator controlling in adapter	2021-05-28 20:50:01 +02:00
i2c-core-of.c
i2c-core-slave.c
i2c-core-smbus.c	i2c: smbus: improve naming in i2c_smbus_xfer_emulated()	2021-01-28 10:14:34 +01:00
i2c-core.h
i2c-dev.c	i2c: bail out early when RDWR parameters are wrong	2021-03-18 12:15:29 +01:00
i2c-mux.c
i2c-slave-eeprom.c
i2c-slave-testunit.c	i2c: testunit: add support for block process calls	2021-02-12 11:11:04 +01:00
i2c-smbus.c
i2c-stub.c	i2c: stub: remove definition of DEBUG	2021-01-17 13:00:10 +01:00
Kconfig	i2c: add slave testunit driver	2020-09-21 11:02:17 +02:00
Makefile	i2c: add slave testunit driver	2020-09-21 11:02:17 +02:00