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		2203747c97
		
	
	
	
	
		
			
			Platform data for device drivers should be defined in include/linux/platform_data/*.h, not in the architecture and platform specific directories. This moves such data out of the omap include directories Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@ti.com> Cc: "Benoît Cousson" <b-cousson@ti.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Ohad Ben-Cohen <ohad@wizery.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Jarkko Nikula <jarkko.nikula@bitmer.com> Cc: Liam Girdwood <lrg@ti.com> Cc: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Cc: Jean Pihet <j-pihet@ti.com> Cc: J Keerthy <j-keerthy@ti.com> Cc: linux-omap@vger.kernel.org
		
			
				
	
	
		
			141 lines
		
	
	
	
		
			3.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			141 lines
		
	
	
	
		
			3.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * gpmc-nand.c
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|  *
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|  * Copyright (C) 2009 Texas Instruments
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|  * Vimal Singh <vimalsingh@ti.com>
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  */
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| 
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| #include <linux/kernel.h>
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| #include <linux/platform_device.h>
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| #include <linux/io.h>
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| #include <linux/mtd/nand.h>
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| #include <linux/platform_data/mtd-nand-omap2.h>
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| 
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| #include <asm/mach/flash.h>
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| 
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| #include <plat/gpmc.h>
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| 
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| #include "soc.h"
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| 
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| static struct resource gpmc_nand_resource[] = {
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| 	{
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| 		.flags		= IORESOURCE_MEM,
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| 	},
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| 	{
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| 		.flags		= IORESOURCE_IRQ,
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| 	},
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| 	{
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| 		.flags		= IORESOURCE_IRQ,
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| 	},
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| };
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| 
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| static struct platform_device gpmc_nand_device = {
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| 	.name		= "omap2-nand",
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| 	.id		= 0,
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| 	.num_resources	= ARRAY_SIZE(gpmc_nand_resource),
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| 	.resource	= gpmc_nand_resource,
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| };
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| 
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| static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data)
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| {
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| 	struct gpmc_timings t;
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| 	int err;
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| 
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| 	if (!gpmc_nand_data->gpmc_t)
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| 		return 0;
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| 
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| 	memset(&t, 0, sizeof(t));
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| 	t.sync_clk = gpmc_nand_data->gpmc_t->sync_clk;
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| 	t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on);
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| 	t.adv_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->adv_on);
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| 
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| 	/* Read */
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| 	t.adv_rd_off = gpmc_round_ns_to_ticks(
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| 				gpmc_nand_data->gpmc_t->adv_rd_off);
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| 	t.oe_on  = t.adv_on;
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| 	t.access = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->access);
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| 	t.oe_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->oe_off);
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| 	t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_rd_off);
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| 	t.rd_cycle  = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->rd_cycle);
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| 
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| 	/* Write */
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| 	t.adv_wr_off = gpmc_round_ns_to_ticks(
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| 				gpmc_nand_data->gpmc_t->adv_wr_off);
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| 	t.we_on  = t.oe_on;
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| 	if (cpu_is_omap34xx()) {
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| 	    t.wr_data_mux_bus =	gpmc_round_ns_to_ticks(
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| 				gpmc_nand_data->gpmc_t->wr_data_mux_bus);
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| 	    t.wr_access = gpmc_round_ns_to_ticks(
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| 				gpmc_nand_data->gpmc_t->wr_access);
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| 	}
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| 	t.we_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->we_off);
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| 	t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_wr_off);
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| 	t.wr_cycle  = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle);
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| 
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| 	/* Configure GPMC */
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| 	if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
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| 		gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 1);
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| 	else
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| 		gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 0);
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| 	gpmc_cs_configure(gpmc_nand_data->cs,
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| 			GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
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| 	gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_WP, 0);
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| 	err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t);
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| 	if (err)
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| 		return err;
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| 
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| 	return 0;
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| }
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| 
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| int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
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| {
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| 	int err	= 0;
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| 	struct device *dev = &gpmc_nand_device.dev;
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| 
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| 	gpmc_nand_device.dev.platform_data = gpmc_nand_data;
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| 
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| 	err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
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| 				(unsigned long *)&gpmc_nand_resource[0].start);
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| 	if (err < 0) {
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| 		dev_err(dev, "Cannot request GPMC CS\n");
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| 		return err;
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| 	}
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| 
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| 	gpmc_nand_resource[0].end = gpmc_nand_resource[0].start +
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| 							NAND_IO_SIZE - 1;
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| 
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| 	gpmc_nand_resource[1].start =
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| 				gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
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| 	gpmc_nand_resource[2].start =
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| 				gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
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| 	 /* Set timings in GPMC */
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| 	err = omap2_nand_gpmc_retime(gpmc_nand_data);
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| 	if (err < 0) {
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| 		dev_err(dev, "Unable to set gpmc timings: %d\n", err);
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| 		return err;
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| 	}
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| 
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| 	/* Enable RD PIN Monitoring Reg */
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| 	if (gpmc_nand_data->dev_ready) {
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| 		gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1);
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| 	}
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| 
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| 	gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
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| 
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| 	err = platform_device_register(&gpmc_nand_device);
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| 	if (err < 0) {
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| 		dev_err(dev, "Unable to register NAND device\n");
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| 		goto out_free_cs;
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| 	}
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| 
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| 	return 0;
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| 
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| out_free_cs:
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| 	gpmc_cs_free(gpmc_nand_data->cs);
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| 
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| 	return err;
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| }
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