Mauro Rossi d85a1e536a drm/amd/display: dce_opp: add DCE6 specific macros,functions ... [Why] DCE6 has no FMT_TRUNCATE_MODE bit in FMT_BIT_DEPTH_CONTROL register DCE6 has no FMT_CLAMP_COMPONENT_{R,G,B} registers DCE6 has no FMT_SUBSAMPLING_{MODE,ORDER} bits in FMT_CONTROL register [How] Add DCE6 specific macros definitions for OPP registers and masks DCE6 OPP macros will avoid buiding errors when using DCE6 headers Add dce60_set_truncation() w/o FMT_TRUNCATE_MODE bit programming Add dce60_opp_set_clamping() w/o Format Clamp Component programming Add dce60_opp_program_fmt() w/o Format Subsampling bits programming Add dce60_opp_program_bit_depth_reduction() with dce60_set_truncation Use dce60_opp_program_fmt() in dce60_opp_funcs Use dce60_opp_program_bit_depth_reduction() in dce60_opp_funcs Add DCE6 specific dce60_opp_construct Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-07-27 16:46:28 -04:00
..
amdgpu_dm	drm/amd/display: amdgpu_dm: add SI support (v4)	2020-07-27 16:46:05 -04:00
dc	drm/amd/display: dce_opp: add DCE6 specific macros,functions	2020-07-27 16:46:28 -04:00
dmub	drm/amd/display: [FW Promotion] Release 0.0.25	2020-07-21 15:37:39 -04:00
include	drm/amd/display: add asics info for SI parts	2020-07-27 16:45:44 -04:00
modules	drm/amd/display: Implement AMD VSIF V3	2020-07-21 15:37:39 -04:00
Kconfig	drm/amd/display: Add DCN3 to Kconfig	2020-07-01 01:59:15 -04:00
Makefile
TODO