Kefeng Wang d5935537c8 riscv: Improve stack randomisation on RV64 ... This enlarges the bits availiable for stack randomisation on RV64 from the default of 8MiB to 1GiB, to match arm64 and x86. Also, update the documentation to reflect our support for stack randomisation. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> [Palmer: commit text] Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>		2021-09-10 22:25:34 -07:00
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boot	riscv: dts: microchip: Add ethernet0 to the aliases node	2021-08-24 20:57:32 -07:00
configs	riscv: defconfig: enable NLS_CODEPAGE_437, NLS_ISO8859_1	2021-09-10 21:31:12 -07:00
errata	riscv: skip errata_cip_453.o if CONFIG_ERRATA_SIFIVE_CIP_453 is disabled	2021-06-01 21:16:41 -07:00
include	riscv: Improve stack randomisation on RV64	2021-09-10 22:25:34 -07:00
kernel	RISC-V Patches for the 5.15 Merge Window, Part 1	2021-09-05 11:31:23 -07:00
lib	riscv: __asm_copy_to-from_user: Fix: Typos in comments	2021-07-23 17:49:12 -07:00
mm	RISC-V Patches for the 5.15 Merge Window, Part 1	2021-09-05 11:31:23 -07:00
net	bpf: Introduce BPF nospec instruction for mitigating Spectre v4	2021-07-29 00:20:56 +02:00
Kbuild	riscv: Allow device trees to be built into the kernel	2020-05-18 11:38:05 -07:00
Kconfig	RISC-V Patches for the 5.15 Merge Window, Part 1	2021-09-05 11:31:23 -07:00
Kconfig.debug	RISC-V: Remove EARLY_PRINTK support	2018-12-17 10:23:46 -08:00
Kconfig.erratas	riscv: enable SiFive errata CIP-453 and CIP-1200 Kconfig only if CONFIG_64BIT=y	2021-05-06 09:40:13 -07:00
Kconfig.socs	riscv: sifive: fix Kconfig errata warning	2021-06-12 17:20:50 -07:00
Makefile	RISC-V Patches for the 5.15 Merge Window, Part 1	2021-09-05 11:31:23 -07:00