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No point in being in global headers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211015011539.628516182@linutronix.de
143 lines
3.9 KiB
C
143 lines
3.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 1994 Linus Torvalds
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*
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* Pentium III FXSR, SSE support
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* General FPU state handling cleanups
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* Gareth Hughes <gareth@valinux.com>, May 2000
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* x86-64 work by Andi Kleen 2002
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*/
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#ifndef _ASM_X86_FPU_INTERNAL_H
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#define _ASM_X86_FPU_INTERNAL_H
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#include <linux/compat.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/mm.h>
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#include <asm/user.h>
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#include <asm/fpu/api.h>
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#include <asm/fpu/xstate.h>
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#include <asm/fpu/xcr.h>
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#include <asm/cpufeature.h>
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#include <asm/trace/fpu.h>
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/*
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* High level FPU state handling functions:
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*/
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extern bool fpu__restore_sig(void __user *buf, int ia32_frame);
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extern void fpu__clear_user_states(struct fpu *fpu);
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extern int fpu__exception_code(struct fpu *fpu, int trap_nr);
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extern void fpu_sync_fpstate(struct fpu *fpu);
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/*
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* Boot time FPU initialization functions:
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*/
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extern void fpu__init_cpu(void);
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extern void fpu__init_system_xstate(void);
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extern void fpu__init_cpu_xstate(void);
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extern void fpu__init_system(struct cpuinfo_x86 *c);
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extern void fpu__init_check_bugs(void);
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extern void fpu__resume_cpu(void);
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extern union fpregs_state init_fpstate;
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extern void fpstate_init_user(union fpregs_state *state);
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#ifdef CONFIG_MATH_EMULATION
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extern void fpstate_init_soft(struct swregs_state *soft);
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#else
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static inline void fpstate_init_soft(struct swregs_state *soft) {}
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#endif
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extern void restore_fpregs_from_fpstate(union fpregs_state *fpstate, u64 mask);
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extern bool copy_fpstate_to_sigframe(void __user *buf, void __user *fp, int size);
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/*
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* FPU context switch related helper methods:
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*/
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DECLARE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);
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/*
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* The in-register FPU state for an FPU context on a CPU is assumed to be
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* valid if the fpu->last_cpu matches the CPU, and the fpu_fpregs_owner_ctx
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* matches the FPU.
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*
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* If the FPU register state is valid, the kernel can skip restoring the
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* FPU state from memory.
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*
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* Any code that clobbers the FPU registers or updates the in-memory
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* FPU state for a task MUST let the rest of the kernel know that the
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* FPU registers are no longer valid for this task.
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*
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* Either one of these invalidation functions is enough. Invalidate
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* a resource you control: CPU if using the CPU for something else
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* (with preemption disabled), FPU for the current task, or a task that
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* is prevented from running by the current task.
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*/
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static inline void __cpu_invalidate_fpregs_state(void)
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{
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__this_cpu_write(fpu_fpregs_owner_ctx, NULL);
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}
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static inline void __fpu_invalidate_fpregs_state(struct fpu *fpu)
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{
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fpu->last_cpu = -1;
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}
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static inline int fpregs_state_valid(struct fpu *fpu, unsigned int cpu)
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{
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return fpu == this_cpu_read(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu;
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}
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/*
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* These generally need preemption protection to work,
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* do try to avoid using these on their own:
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*/
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static inline void fpregs_deactivate(struct fpu *fpu)
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{
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this_cpu_write(fpu_fpregs_owner_ctx, NULL);
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trace_x86_fpu_regs_deactivated(fpu);
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}
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static inline void fpregs_activate(struct fpu *fpu)
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{
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this_cpu_write(fpu_fpregs_owner_ctx, fpu);
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trace_x86_fpu_regs_activated(fpu);
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}
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/* Internal helper for switch_fpu_return() and signal frame setup */
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static inline void fpregs_restore_userregs(void)
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{
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struct fpu *fpu = ¤t->thread.fpu;
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int cpu = smp_processor_id();
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if (WARN_ON_ONCE(current->flags & PF_KTHREAD))
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return;
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if (!fpregs_state_valid(fpu, cpu)) {
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u64 mask;
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/*
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* This restores _all_ xstate which has not been
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* established yet.
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*
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* If PKRU is enabled, then the PKRU value is already
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* correct because it was either set in switch_to() or in
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* flush_thread(). So it is excluded because it might be
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* not up to date in current->thread.fpu.xsave state.
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*/
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mask = xfeatures_mask_restore_user() |
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xfeatures_mask_supervisor();
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restore_fpregs_from_fpstate(&fpu->state, mask);
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fpregs_activate(fpu);
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fpu->last_cpu = cpu;
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}
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clear_thread_flag(TIF_NEED_FPU_LOAD);
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}
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#endif /* _ASM_X86_FPU_INTERNAL_H */
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