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b9fe9985ae
It's absolutely redundant seeing by default each node is embedded into its own example-X node with address and size cells set to 1. Link: https://lore.kernel.org/r/20221113191301.5526-5-Sergey.Semin@baikalelectronics.ru Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org>
55 lines
1.3 KiB
YAML
55 lines
1.3 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys DesignWare PCIe endpoint interface
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maintainers:
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- Jingoo Han <jingoohan1@gmail.com>
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- Gustavo Pimentel <gustavo.pimentel@synopsys.com>
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description: |
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Synopsys DesignWare PCIe host controller endpoint
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allOf:
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- $ref: /schemas/pci/pci-ep.yaml#
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- $ref: /schemas/pci/snps,dw-pcie-common.yaml#
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properties:
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compatible:
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anyOf:
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- {}
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- const: snps,dw-pcie-ep
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reg:
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description: |
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It should contain Data Bus Interface (dbi) and config registers for all
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versions.
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For designware core version >= 4.80, it may contain ATU address space.
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minItems: 2
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maxItems: 4
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reg-names:
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minItems: 2
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maxItems: 4
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items:
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enum: [dbi, dbi2, config, atu, addr_space, link, atu_dma, appl]
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required:
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- reg
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- reg-names
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- compatible
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additionalProperties: true
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examples:
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- |
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pcie-ep@dfd00000 {
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compatible = "snps,dw-pcie-ep";
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reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
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<0xdfc01000 0x0001000>, /* IP registers 2 */
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<0xd0000000 0x2000000>; /* Configuration space */
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reg-names = "dbi", "dbi2", "addr_space";
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};
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