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171df58028
Cortex-A55 is affected by an erratum where in rare circumstances the CPUs may not handle a race between a break-before-make sequence on one CPU, and another CPU accessing the same page. This could allow a store to a page that has been unmapped. Work around this by adding the affected CPUs to the list that needs TLB sequences to be done twice. Signed-off-by: James Morse <james.morse@arm.com> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20220930131959.3082594-1-james.morse@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| .. | ||
| acpi_object_usage.rst | ||
| amu.rst | ||
| arm-acpi.rst | ||
| asymmetric-32bit.rst | ||
| booting.rst | ||
| cpu-feature-registers.rst | ||
| elf_hwcaps.rst | ||
| features.rst | ||
| hugetlbpage.rst | ||
| index.rst | ||
| kasan-offsets.sh | ||
| legacy_instructions.rst | ||
| memory-tagging-extension.rst | ||
| memory.rst | ||
| perf.rst | ||
| pointer-authentication.rst | ||
| silicon-errata.rst | ||
| sme.rst | ||
| sve.rst | ||
| tagged-address-abi.rst | ||
| tagged-pointers.rst | ||