mirror of
				git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
				synced 2025-11-01 09:13:37 +00:00 
			
		
		
		
	As indicated in link: https://lore.kernel.org/all/20220822204945.GA808626-robh@kernel.org/ DT schema files should not have 'Device Tree Binding' as part of there title: line. Remove this in most .yaml files, so hopefully preventing developers copying it into new .yaml files, and being asked to remove it. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20220825020427.3460650-1-andrew@lunn.ch Signed-off-by: Rob Herring <robh@kernel.org>
		
			
				
	
	
		
			60 lines
		
	
	
	
		
			1.2 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
			
		
		
	
	
			60 lines
		
	
	
	
		
			1.2 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
# SPDX-License-Identifier: GPL-2.0
 | 
						|
%YAML 1.2
 | 
						|
---
 | 
						|
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-phy-clk.yaml#
 | 
						|
$schema: http://devicetree.org/meta-schemas/core.yaml#
 | 
						|
 | 
						|
title: Allwinner A80 USB PHY Clock
 | 
						|
 | 
						|
maintainers:
 | 
						|
  - Chen-Yu Tsai <wens@csie.org>
 | 
						|
  - Maxime Ripard <mripard@kernel.org>
 | 
						|
 | 
						|
deprecated: true
 | 
						|
 | 
						|
properties:
 | 
						|
  "#clock-cells":
 | 
						|
    const: 1
 | 
						|
    description: >
 | 
						|
      The additional ID argument passed to the clock shall refer to
 | 
						|
      the index of the output.
 | 
						|
 | 
						|
  "#reset-cells":
 | 
						|
    const: 1
 | 
						|
 | 
						|
  compatible:
 | 
						|
    const: allwinner,sun9i-a80-usb-phy-clk
 | 
						|
 | 
						|
  reg:
 | 
						|
    maxItems: 1
 | 
						|
 | 
						|
  clocks:
 | 
						|
    maxItems: 1
 | 
						|
 | 
						|
  clock-output-names:
 | 
						|
    maxItems: 6
 | 
						|
 | 
						|
required:
 | 
						|
  - "#clock-cells"
 | 
						|
  - "#reset-cells"
 | 
						|
  - compatible
 | 
						|
  - reg
 | 
						|
  - clocks
 | 
						|
  - clock-output-names
 | 
						|
 | 
						|
additionalProperties: false
 | 
						|
 | 
						|
examples:
 | 
						|
  - |
 | 
						|
    clk@a08004 {
 | 
						|
        #clock-cells = <1>;
 | 
						|
        #reset-cells = <1>;
 | 
						|
        compatible = "allwinner,sun9i-a80-usb-phy-clk";
 | 
						|
        reg = <0x00a08004 0x4>;
 | 
						|
        clocks = <&ahb1_gates 1>;
 | 
						|
        clock-output-names = "usb_phy0", "usb_hsic1_480M",
 | 
						|
                             "usb_phy1", "usb_hsic2_480M",
 | 
						|
                             "usb_phy2", "usb_hsic_12M";
 | 
						|
    };
 | 
						|
 | 
						|
...
 |