Steven Rostedt 5b2bdbc845 x86: Init per-cpu shadow copy of CR4 on 32-bit CPUs too ... Commit: 1e02ce4ccc ("x86: Store a per-cpu shadow copy of CR4") added a shadow CR4 such that reads and writes that do not modify the CR4 execute much faster than always reading the register itself. The change modified cpu_init() in common.c, so that the shadow CR4 gets initialized before anything uses it. Unfortunately, there's two cpu_init()s in common.c. There's one for 64-bit and one for 32-bit. The commit only added the shadow init to the 64-bit path, but the 32-bit path needs the init too. Link: http://lkml.kernel.org/r/20150227125208.71c36402@gandalf.local.home Fixes: 1e02ce4ccc "x86: Store a per-cpu shadow copy of CR4" Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Acked-by: Andy Lutomirski <luto@amacapital.net> Cc: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: http://lkml.kernel.org/r/20150227145019.2bdd4354@gandalf.local.home Signed-off-by: Ingo Molnar <mingo@kernel.org>		2015-02-28 08:04:20 +01:00
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mcheck
microcode	* Two fixes hardening microcode data handling. (Quentin Casasnovas)	2015-02-19 13:32:42 +01:00
mtrr
.gitignore
amd.c
bugs.c
bugs_64.c
centaur.c
common.c	x86: Init per-cpu shadow copy of CR4 on 32-bit CPUs too	2015-02-28 08:04:20 +01:00
cpu.h
cyrix.c
hypervisor.c
intel.c	x86/cpu/intel: Fix trivial typo in intel_tlb_table[]	2015-02-22 08:55:58 +01:00
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perf_event_intel.c
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perf_event_intel_uncore.c
perf_event_intel_uncore.h
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perf_event_intel_uncore_snb.c
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