Hauke Mehrtens aea7687e77 mtd: spinand: gigadevice: Add QE Bit ... The following GigaDevice chips have the QE BIT in the feature flags, I checked the datasheets, but did not try this. * GD5F1GQ4xExxG * GD5F1GQ4xFxxG * GD5F1GQ4UAYIG * GD5F4GQ4UAYIG The Quad operations like 0xEB mention that the QE bit has to be set. Fixes: c93c613214 ("mtd: spinand: add support for GigaDevice GD5FxGQ4xA") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Tested-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200820165121.3192-3-hauke@hauke-m.de		2020-09-30 16:44:16 +02:00
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onenand	mtd: nand: Drop useless 'depends on' in Kconfig	2020-06-26 08:35:03 +02:00
raw	mtd: rawnand: vf610: disable clk on error handling path in probe	2020-09-30 16:44:16 +02:00
spi	mtd: spinand: gigadevice: Add QE Bit	2020-09-30 16:44:16 +02:00
bbt.c	mtd: nand: Fix memory allocation in nanddev_bbt_init()	2018-11-28 15:41:50 +01:00
core.c	mtd: nand: Add max_bad_eraseblocks_per_lun info to memorg	2019-04-08 10:21:08 +02:00
ecc.c	mtd: nand: Introduce the ECC engine framework	2020-09-02 09:28:15 +02:00
Kconfig	mtd: nand: Introduce the ECC engine framework	2020-09-02 09:28:15 +02:00
Makefile	mtd: nand: Introduce the ECC engine framework	2020-09-02 09:28:15 +02:00