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![]() The memory clock-rate change could be running on a non-boot CPU, while the boot CPU handles the EMC interrupt. This introduces an unnecessary latency since boot CPU should handle the interrupt and then notify the sibling CPU about clock-rate change completion. In some rare cases boot CPU could be in uninterruptible state for a significant time (like in a case of KASAN + NFS root), it could get to the point that completion timeouts before boot CPU gets a chance to handle interrupt. The solution is to get rid of the completion and replace it with interrupt-status polling. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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samsung | ||
tegra | ||
.gitignore | ||
atmel-ebi.c | ||
atmel-sdramc.c | ||
brcmstb_dpfe.c | ||
bt1-l2-ctl.c | ||
da8xx-ddrctl.c | ||
emif-asm-offsets.c | ||
emif.c | ||
emif.h | ||
fsl-corenet-cf.c | ||
fsl_ifc.c | ||
jedec_ddr.h | ||
jedec_ddr_data.c | ||
jz4780-nemc.c | ||
Kconfig | ||
Makefile | ||
mtk-smi.c | ||
mvebu-devbus.c | ||
of_memory.c | ||
of_memory.h | ||
omap-gpmc.c | ||
pl172.c | ||
pl353-smc.c | ||
ti-aemif.c | ||
ti-emif-pm.c | ||
ti-emif-sram-pm.S |