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linux/arch/xtensa/boot/dts
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Max Filippov abfbd89595 xtensa: xtfpga: fix serial port register width and endianness 
Serial port is attached to XTFPGA boards as native endian device, mark
it as such in DTS and pass correct endianness in platform data.
Set register width in DTS to 4, this way it matches the platform data
and works correctly on big-endian CPUs.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-03-11 08:53:31 +00:00
..
kc705.dts xtensa: configure kc705 for highmem 2014-08-14 11:59:25 +04:00
kc705_nommu.dts xtensa: nommu: xtfpga: add kc705 DTS 2015-11-02 18:03:11 +03:00
lx60.dts
lx200mx.dts xtensa: xtfpga: add lx200 SMP DTS and defconfig 2014-10-21 13:28:43 +04:00
Makefile xtensa: enable building of all dtbs 2015-10-27 16:12:16 -05:00
ml605.dts
xtfpga-flash-4m.dtsi xtensa: xtfpga: introduce SoC I/O bus 2014-04-06 21:32:02 +04:00
xtfpga-flash-16m.dtsi xtensa: xtfpga: introduce SoC I/O bus 2014-04-06 21:32:02 +04:00
xtfpga-flash-128m.dtsi xtensa: add support for KC705 2014-04-06 21:32:02 +04:00
xtfpga.dtsi xtensa: xtfpga: fix serial port register width and endianness 2016-03-11 08:53:31 +00:00