Kishon Vijay Abraham I a8b661eb50 PCI: cadence: Convert all r/w accessors to perform only 32-bit accesses ... Certain platforms like TI's J721E using Cadence PCIe IP can perform only 32-bit accesses for reading or writing to Cadence registers. Convert all read and write accesses to 32-bit in Cadence PCIe driver in preparation for adding PCIe support in TI's J721E SoC. Also add spin lock to disable interrupts while modifying PCI_STATUS register while raising legacy interrupt since PCI_STATUS is accessible by both remote RC and EP and time between read and write should be minimized. Link: https://lore.kernel.org/r/20200722110317.4744-5-kishon@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>		2020-07-27 15:46:16 +01:00
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Kconfig
Makefile
pcie-cadence-ep.c	PCI: cadence: Convert all r/w accessors to perform only 32-bit accesses	2020-07-27 15:46:16 +01:00
pcie-cadence-host.c	PCI: cadence: Fix cdns_pcie_{host|ep}_setup() error path	2020-07-27 15:46:15 +01:00
pcie-cadence-plat.c
pcie-cadence.c
pcie-cadence.h	PCI: cadence: Convert all r/w accessors to perform only 32-bit accesses	2020-07-27 15:46:16 +01:00