Taimur Hassan a47cc3ab05 drm/amd/display: Raise DPG height during timing synchronization ... [Why] Underflow counter increases in AGM when performing some mode switches due to timing sync, which is a known hardware issue. [How] Temporarily raise DPG height during timing sync so that underflow is not reported. Signed-off-by: Taimur Hassan <syed.hassan@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-10-26 13:29:21 -04:00
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hw	drm/amd/display: Raise DPG height during timing synchronization	2020-10-26 13:29:21 -04:00
bw_fixed.h
clock_source.h
compressor.h
core_status.h	drm/amd/display: Source minimum HBlank support	2020-10-26 13:27:52 -04:00
core_types.h	drm/amd/display: Calc DLG from dummy p-state if full p-state unsupported	2020-09-29 16:08:50 -04:00
custom_float.h
dc_link_ddc.h	drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update	2020-07-01 01:59:26 -04:00
dc_link_dp.h	drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update	2020-07-01 01:59:26 -04:00
dce_calcs.h
dcn_calc_math.h	drm/amd/display: fixup DML dependencies	2020-01-16 14:16:48 -05:00
dcn_calcs.h
hw_sequencer.h	drm/amd/display: Block ABM in case of eDP ODM	2020-10-05 15:16:43 -04:00
hw_sequencer_private.h	drm/amd/display: move panel power seq to new panel struct	2020-04-22 18:11:48 -04:00
link_hwss.h	drm/amd/display: implement lttpr logic	2019-11-13 15:29:43 -05:00
reg_helper.h	drm/amd/display: Indirect reg read macro with shift and mask	2020-01-16 14:13:53 -05:00
resource.h	drm/amd/display: Add DCN3 Resource	2020-07-01 01:59:15 -04:00
vm_helper.h	drm/amd/display: move vmid determination logic to a module	2019-06-22 09:34:14 -05:00