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git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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6644c6291e
Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present for any node. Add unevaluatedProperties as needed, and then add any missing properties flagged by the addition. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230926164500.101593-1-robh@kernel.org
385 lines
13 KiB
YAML
385 lines
13 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/thermal/nvidia,tegra124-soctherm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra124 SOCTHERM Thermal Management System
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maintainers:
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- Thierry Reding <thierry.reding@gmail.com>
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- Jon Hunter <jonathanh@nvidia.com>
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description: The SOCTHERM IP block contains thermal sensors, support for
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polled or interrupt-based thermal monitoring, CPU and GPU throttling based
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on temperature trip points, and handling external overcurrent notifications.
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It is also used to manage emergency shutdown in an overheating situation.
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properties:
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compatible:
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enum:
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- nvidia,tegra124-soctherm
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- nvidia,tegra132-soctherm
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- nvidia,tegra210-soctherm
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reg:
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maxItems: 2
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reg-names:
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maxItems: 2
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interrupts:
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items:
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- description: module interrupt
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- description: EDP interrupt
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interrupt-names:
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items:
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- const: thermal
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- const: edp
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clocks:
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items:
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- description: thermal sensor clock
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- description: module clock
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clock-names:
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items:
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- const: tsensor
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- const: soctherm
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resets:
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items:
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- description: module reset
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reset-names:
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items:
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- const: soctherm
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"#thermal-sensor-cells":
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const: 1
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throttle-cfgs:
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$ref: thermal-cooling-devices.yaml
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description: A sub-node which is a container of configuration for each
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hardware throttle events. These events can be set as cooling devices.
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Throttle event sub-nodes must be named as "light" or "heavy".
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unevaluatedProperties: false
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patternProperties:
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"^(light|heavy|oc1)$":
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type: object
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additionalProperties: false
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properties:
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"#cooling-cells":
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const: 2
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nvidia,priority:
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 1
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maximum: 100
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description: Each throttles has its own throttle settings, so the
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SW need to set priorities for various throttle, the HW arbiter
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can select the final throttle settings. Bigger value indicates
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higher priority, In general, higher priority translates to lower
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target frequency. SW needs to ensure that critical thermal
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alarms are given higher priority, and ensure that there is no
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race if priority of two vectors is set to the same value.
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nvidia,cpu-throt-percent:
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description: This property is for Tegra124 and Tegra210. It is the
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throttling depth of pulse skippers, it's the percentage
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throttling.
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minimum: 0
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maximum: 100
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nvidia,cpu-throt-level:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: This property is only for Tegra132, it is the level
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of pulse skippers, which used to throttle clock frequencies. It
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indicates cpu clock throttling depth, and the depth can be
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programmed.
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enum:
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# none (TEGRA_SOCTHERM_THROT_LEVEL_NONE)
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- 0
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# low (TEGRA_SOCTHERM_THROT_LEVEL_LOW)
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- 1
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# medium (TEGRA_SOCTHERM_THROT_LEVEL_MED)
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- 2
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# high (TEGRA_SOCTHERM_THROT_LEVEL_HIGH)
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- 3
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nvidia,gpu-throt-level:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: This property is for Tegra124 and Tegra210. It is the
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level of pulse skippers, which used to throttle clock
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frequencies. It indicates gpu clock throttling depth and can be
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programmed to any of the following values which represent a
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throttling percentage.
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enum:
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# none (0%, TEGRA_SOCTHERM_THROT_LEVEL_NONE)
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- 0
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# low (50%, TEGRA_SOCTHERM_THROT_LEVEL_LOW)
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- 1
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# medium (75%, TEGRA_SOCTHERM_THROT_LEVEL_MED)
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- 2
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# high (85%, TEGRA_SOCTHERM_THROT_LEVEL_HIGH)
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- 3
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# optional
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# Tegra210 specific and valid only for OCx throttle events
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nvidia,count-threshold:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Specifies the number of OC events that are required
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for triggering an interrupt. Interrupts are not triggered if the
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property is missing. A value of 0 will interrupt on every OC
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alarm.
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nvidia,polarity-active-low:
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$ref: /schemas/types.yaml#/definitions/flag
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description: Configures the polarity of the OC alaram signal. If
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present, this means assert low, otherwise assert high.
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nvidia,alarm-filter:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Number of clocks to filter event. When the filter
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expires (which means the OC event has not occurred for a long
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time), the counter is cleared and filter is rearmed.
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default: 0
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nvidia,throttle-period-us:
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description: Specifies the number of microseconds for which
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throttling is engaged after the OC event is deasserted.
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default: 0
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# optional
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nvidia,thermtrips:
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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description: |
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When present, this property specifies the temperature at which the
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SOCTHERM hardware will assert the thermal trigger signal to the Power
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Management IC, which can be configured to reset or shutdown the device.
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It is an array of pairs where each pair represents a tsensor ID followed
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by a temperature in milli Celcius. In the absence of this property the
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critical trip point will be used for thermtrip temperature.
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Note:
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- the "critical" type trip points will be used to set the temperature at
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which the SOCTHERM hardware will assert a thermal trigger if the
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"nvidia,thermtrips" property is missing. When the thermtrips property
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is present, the breach of a critical trip point is reported back to
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the thermal framework to implement software shutdown.
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- the "hot" type trip points will be set to SOCTHERM hardware as the
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throttle temperature. Once the temperature of this thermal zone is
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higher than it, it will trigger the HW throttle event.
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items:
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items:
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- description: sensor ID
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oneOf:
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- description: CPU sensor
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const: 0
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- description: MEM sensor
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const: 1
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- description: GPU sensor
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const: 2
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- description: PLLX sensor
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const: 3
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- description: temperature threshold (in millidegree Celsius)
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- interrupt-names
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- clocks
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- clock-names
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- resets
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- reset-names
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- "#thermal-sensor-cells"
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allOf:
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- $ref: thermal-sensor.yaml
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- if:
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properties:
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compatible:
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contains:
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enum:
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- nvidia,tegra124-soctherm
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- nvidia,tegra210-soctherm
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then:
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properties:
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reg:
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items:
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- description: SOCTHERM register set
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- description: clock and reset controller registers
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reg-names:
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items:
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- const: soctherm-reg
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- const: car-reg
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else:
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properties:
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reg:
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items:
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- description: SOCTHERM register set
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- description: CCROC registers
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reg-names:
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items:
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- const: soctherm-reg
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- const: ccroc-reg
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/tegra124-car.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/thermal/tegra124-soctherm.h>
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soctherm@700e2000 {
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compatible = "nvidia,tegra124-soctherm";
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reg = <0x700e2000 0x600>, /* SOC_THERM reg_base */
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<0x60006000 0x400>; /* CAR reg_base */
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reg-names = "soctherm-reg", "car-reg";
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "thermal", "edp";
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clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
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<&tegra_car TEGRA124_CLK_SOC_THERM>;
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clock-names = "tsensor", "soctherm";
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resets = <&tegra_car 78>;
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reset-names = "soctherm";
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#thermal-sensor-cells = <1>;
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nvidia,thermtrips = <TEGRA124_SOCTHERM_SENSOR_CPU 102500>,
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<TEGRA124_SOCTHERM_SENSOR_GPU 103000>;
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throttle-cfgs {
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/*
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* When the "heavy" cooling device triggered,
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* the HW will skip cpu clock's pulse in 85% depth,
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* skip gpu clock's pulse in 85% level
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*/
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heavy {
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nvidia,priority = <100>;
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nvidia,cpu-throt-percent = <85>;
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nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
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#cooling-cells = <2>;
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};
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/*
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* When the "light" cooling device triggered,
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* the HW will skip cpu clock's pulse in 50% depth,
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* skip gpu clock's pulse in 50% level
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*/
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light {
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nvidia,priority = <80>;
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nvidia,cpu-throt-percent = <50>;
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nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_LOW>;
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#cooling-cells = <2>;
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};
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/*
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* If these two devices are triggered in same time, the HW throttle
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* arbiter will select the highest priority as the final throttle
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* settings to skip cpu pulse.
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*/
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oc1 {
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nvidia,priority = <50>;
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nvidia,polarity-active-low;
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nvidia,count-threshold = <100>;
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nvidia,alarm-filter = <5100000>;
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nvidia,throttle-period-us = <0>;
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nvidia,cpu-throt-percent = <75>;
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nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_MED>;
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};
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};
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};
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# referring to Tegra132's "reg", "reg-names" and "throttle-cfgs"
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- |
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thermal-sensor@700e2000 {
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compatible = "nvidia,tegra132-soctherm";
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reg = <0x700e2000 0x600>, /* SOC_THERM reg_base */
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<0x70040000 0x200>; /* CCROC reg_base */
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reg-names = "soctherm-reg", "ccroc-reg";
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "thermal", "edp";
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clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
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<&tegra_car TEGRA124_CLK_SOC_THERM>;
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clock-names = "tsensor", "soctherm";
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resets = <&tegra_car 78>;
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reset-names = "soctherm";
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#thermal-sensor-cells = <1>;
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throttle-cfgs {
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/*
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* When the "heavy" cooling device triggered,
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* the HW will skip cpu clock's pulse in HIGH level
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*/
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heavy {
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nvidia,priority = <100>;
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nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
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#cooling-cells = <2>;
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};
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/*
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* When the "light" cooling device triggered,
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* the HW will skip cpu clock's pulse in MED level
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*/
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light {
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nvidia,priority = <80>;
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nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_MED>;
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#cooling-cells = <2>;
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};
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/*
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* If these two devices are triggered in same time, the HW throttle
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* arbiter will select the highest priority as the final throttle
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* settings to skip cpu pulse.
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*/
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};
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};
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# referring to thermal sensors
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- |
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thermal-zones {
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cpu-thermal {
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polling-delay-passive = <1000>;
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polling-delay = <1000>;
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thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
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trips {
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cpu_shutdown_trip: shutdown-trip {
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temperature = <102500>;
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hysteresis = <1000>;
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type = "critical";
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};
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cpu_throttle_trip: throttle-trip {
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temperature = <100000>;
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hysteresis = <1000>;
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type = "hot";
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};
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};
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cooling-maps {
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map0 {
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trip = <&cpu_throttle_trip>;
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cooling-device = <&throttle_heavy 1 1>;
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};
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};
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};
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};
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