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![]() - Stage-2 isolation for the host kernel when running in protected mode - Guest SVE support when running in nVHE mode - Force W^X hypervisor mappings in nVHE mode - ITS save/restore for guests using direct injection with GICv4.1 - nVHE panics now produce readable backtraces - Guest support for PTP using the ptp_kvm driver - Performance improvements in the S2 fault handler x86: - Optimizations and cleanup of nested SVM code - AMD: Support for virtual SPEC_CTRL - Optimizations of the new MMU code: fast invalidation, zap under read lock, enable/disably dirty page logging under read lock - /dev/kvm API for AMD SEV live migration (guest API coming soon) - support SEV virtual machines sharing the same encryption context - support SGX in virtual machines - add a few more statistics - improved directed yield heuristics - Lots and lots of cleanups Generic: - Rework of MMU notifier interface, simplifying and optimizing the architecture-specific code - Some selftests improvements -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmCJ13kUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroM1HAgAqzPxEtiTPTFeFJV5cnPPJ3dFoFDK y/juZJUQ1AOtvuWzzwuf175ewkv9vfmtG6rVohpNSkUlJYeoc6tw7n8BTTzCVC1b c/4Dnrjeycr6cskYlzaPyV6MSgjSv5gfyj1LA5UEM16LDyekmaynosVWY5wJhju+ Bnyid8l8Utgz+TLLYogfQJQECCrsU0Wm//n+8TWQgLf1uuiwshU5JJe7b43diJrY +2DX+8p9yWXCTz62sCeDWNahUv8AbXpMeJ8uqZPYcN1P0gSEUGu8xKmLOFf9kR7b M4U1Gyz8QQbjd2lqnwiWIkvRLX6gyGVbq2zH0QbhUe5gg3qGUX7JjrhdDQ== =AXUi -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull kvm updates from Paolo Bonzini: "This is a large update by KVM standards, including AMD PSP (Platform Security Processor, aka "AMD Secure Technology") and ARM CoreSight (debug and trace) changes. ARM: - CoreSight: Add support for ETE and TRBE - Stage-2 isolation for the host kernel when running in protected mode - Guest SVE support when running in nVHE mode - Force W^X hypervisor mappings in nVHE mode - ITS save/restore for guests using direct injection with GICv4.1 - nVHE panics now produce readable backtraces - Guest support for PTP using the ptp_kvm driver - Performance improvements in the S2 fault handler x86: - AMD PSP driver changes - Optimizations and cleanup of nested SVM code - AMD: Support for virtual SPEC_CTRL - Optimizations of the new MMU code: fast invalidation, zap under read lock, enable/disably dirty page logging under read lock - /dev/kvm API for AMD SEV live migration (guest API coming soon) - support SEV virtual machines sharing the same encryption context - support SGX in virtual machines - add a few more statistics - improved directed yield heuristics - Lots and lots of cleanups Generic: - Rework of MMU notifier interface, simplifying and optimizing the architecture-specific code - a handful of "Get rid of oprofile leftovers" patches - Some selftests improvements" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (379 commits) KVM: selftests: Speed up set_memory_region_test selftests: kvm: Fix the check of return value KVM: x86: Take advantage of kvm_arch_dy_has_pending_interrupt() KVM: SVM: Skip SEV cache flush if no ASIDs have been used KVM: SVM: Remove an unnecessary prototype declaration of sev_flush_asids() KVM: SVM: Drop redundant svm_sev_enabled() helper KVM: SVM: Move SEV VMCB tracking allocation to sev.c KVM: SVM: Explicitly check max SEV ASID during sev_hardware_setup() KVM: SVM: Unconditionally invoke sev_hardware_teardown() KVM: SVM: Enable SEV/SEV-ES functionality by default (when supported) KVM: SVM: Condition sev_enabled and sev_es_enabled on CONFIG_KVM_AMD_SEV=y KVM: SVM: Append "_enabled" to module-scoped SEV/SEV-ES control variables KVM: SEV: Mask CPUID[0x8000001F].eax according to supported features KVM: SVM: Move SEV module params/variables to sev.c KVM: SVM: Disable SEV/SEV-ES if NPT is disabled KVM: SVM: Free sev_asid_bitmap during init if SEV setup fails KVM: SVM: Zero out the VMCB array used to track SEV ASID association x86/sev: Drop redundant and potentially misleading 'sev_enabled' KVM: x86: Move reverse CPUID helpers to separate header file KVM: x86: Rename GPR accessors to make mode-aware variants the defaults ... |
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altera | ||
amlogic | ||
apm | ||
bcm | ||
calxeda | ||
cpu-enable-method | ||
firmware | ||
freescale | ||
hisilicon | ||
keystone | ||
marvell | ||
mediatek | ||
mrvl | ||
msm | ||
mstar | ||
npcm | ||
nxp | ||
omap | ||
rockchip | ||
samsung | ||
socionext | ||
sprd | ||
stm32 | ||
sunxi | ||
tegra | ||
ti | ||
ux500 | ||
vt8500 | ||
actions.yaml | ||
altera.yaml | ||
amazon,al.yaml | ||
amlogic,scpi.txt | ||
amlogic.yaml | ||
apple.yaml | ||
arm,integrator.yaml | ||
arm,realview.yaml | ||
arm,scmi.txt | ||
arm,scpi.txt | ||
arm,versatile.yaml | ||
arm,vexpress-juno.yaml | ||
arm-dsu-pmu.txt | ||
atmel-at91.yaml | ||
atmel-sysregs.txt | ||
axis.txt | ||
axxia.yaml | ||
bitmain.yaml | ||
calxeda.yaml | ||
cavium-thunder.txt | ||
cavium-thunder2.txt | ||
cci.txt | ||
coresight-cpu-debug.txt | ||
coresight-cti.yaml | ||
coresight.txt | ||
cpu-capacity.txt | ||
cpus.yaml | ||
digicolor.yaml | ||
ete.yaml | ||
fsl.yaml | ||
fw-cfg.txt | ||
gemini.txt | ||
idle-states.yaml | ||
intel,keembay.yaml | ||
intel-ixp4xx.yaml | ||
juno,scpi.txt | ||
l2c2x0.yaml | ||
mediatek.yaml | ||
microchip,sparx5.yaml | ||
moxart.yaml | ||
nvidia,tegra194-ccplex.yaml | ||
oxnas.txt | ||
pmu.yaml | ||
primecell.yaml | ||
psci.yaml | ||
qcom.yaml | ||
rda.yaml | ||
realtek.yaml | ||
renesas,prr.yaml | ||
renesas.yaml | ||
rockchip.yaml | ||
rtsm-dcscb.txt | ||
scu.txt | ||
secure.txt | ||
sp810.txt | ||
spe-pmu.txt | ||
spear-misc.txt | ||
spear.yaml | ||
ste-nomadik.txt | ||
sti.yaml | ||
sunxi.yaml | ||
swir.txt | ||
syna.txt | ||
tegra.yaml | ||
toshiba.yaml | ||
trbe.yaml | ||
ux500.yaml | ||
versatile-sysreg.txt | ||
vexpress-scc.txt | ||
vexpress-sysreg.txt | ||
vt8500.yaml | ||
xen.txt | ||
xilinx.yaml |