Rob Herring 9f9e59a480 PCI: dwc: Support multiple ATU memory regions ... The current ATU setup only supports a single memory resource which isn't sufficient if there are also prefetchable memory regions. In order to support multiple memory regions, we need to move away from fixed ATU slots and rework the assignment. As there's always an ATU entry for config space, let's assign index 0 to config space. Then we assign memory resources to index 1 and up. Finally, if we have an I/O region and slots remaining, we assign the I/O region last. If there aren't remaining slots, we keep the same config and I/O space sharing. Link: https://lore.kernel.org/r/20201026181652.418729-1-robh@kernel.org Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Vidya Sagar <vidyas@nvidia.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> Cc: Vidya Sagar <vidyas@nvidia.com> Cc: Jingoo Han <jingoohan1@gmail.com> Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com>		2020-11-18 16:01:53 +00:00
..
cadence	PCI: cadence: Simplify cdns_pcie_host_init_address_translation() return expression	2020-10-02 12:52:37 +01:00
dwc	PCI: dwc: Support multiple ATU memory regions	2020-11-18 16:01:53 +00:00
mobiveil	PCI: mobiveil: Simplify mobiveil_pcie_init_irq_domain() return expression	2020-10-02 12:48:08 +01:00
Kconfig	pci-v5.10-changes	2020-10-22 12:41:00 -07:00
Makefile	PCI: hip: Add handling of HiSilicon HIP PCIe controller errors	2020-09-16 10:30:42 +01:00
pci-aardvark.c	PCI: aardvark: Fix initialization with old Marvell's Arm Trusted Firmware	2020-10-02 16:04:44 +01:00
pci-ftpci100.c
pci-host-common.c
pci-host-generic.c
pci-hyperv-intf.c
pci-hyperv.c	pci-v5.10-changes	2020-10-22 12:41:00 -07:00
pci-loongson.c	PCI: loongson: Simplify loongson_pci_probe() return expression	2020-10-02 12:56:31 +01:00
pci-mvebu.c	PCI: mvebu: Fix duplicate resource requests	2020-11-04 13:55:30 -06:00
pci-rcar-gen2.c
pci-tegra.c	PCI: tegra: Convert to use DEFINE_SEQ_ATTRIBUTE macro	2020-09-28 12:06:22 +01:00
pci-thunder-ecam.c
pci-thunder-pem.c
pci-v3-semi.c	PCI: v3-semi: Remove unneeded break	2020-10-20 10:59:55 -05:00
pci-versatile.c
pci-xgene-msi.c	PCI: xgene: Remove unused assignment to variable msi_val	2020-10-02 12:58:53 +01:00
pci-xgene.c
pcie-altera-msi.c
pcie-altera.c
pcie-brcmstb.c	pci-v5.10-changes	2020-10-22 12:41:00 -07:00
pcie-hisi-error.c	PCI: hip: Add handling of HiSilicon HIP PCIe controller errors	2020-09-16 10:30:42 +01:00
pcie-iproc-bcma.c	PCI: iproc: Use module_bcma_driver to simplify the code	2020-10-02 12:45:26 +01:00
pcie-iproc-msi.c	PCI: iproc: Set affinity mask on MSI interrupts	2020-09-08 22:04:27 +01:00
pcie-iproc-platform.c	PCI: iproc: Fix using plain integer as NULL pointer in iproc_pcie_pltfm_probe	2020-10-09 13:37:57 +01:00
pcie-iproc.c
pcie-iproc.h
pcie-mediatek.c
pcie-rcar-ep.c
pcie-rcar-host.c
pcie-rcar.c
pcie-rcar.h
pcie-rockchip-ep.c
pcie-rockchip-host.c	PCI: rockchip: Fix bus checks in rockchip_pcie_valid_device()	2020-09-08 16:52:42 -05:00
pcie-rockchip.c
pcie-rockchip.h
pcie-tango.c
pcie-xilinx-cpm.c
pcie-xilinx-nwl.c
pcie-xilinx.c
vmd.c	pci-v5.10-changes	2020-10-22 12:41:00 -07:00