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9f587fa29f
Most significant part of JQCR (Job Queue Control Register) contains bits that control endianness: ILE - Immediate Little Endian, DWS - Double Word Swap. The bits are automatically set by the Job Queue Controller HW. Unfortunately these bits are cleared in SW when submitting descriptors via the register-based service interface. >From LS1021A: JQCR_MS = 08080100 - before writing: ILE | DWS | SRC (JR0) JQCR_MS = 30000100 - after writing: WHL | FOUR | SRC (JR0) This would cause problems on little endian caam for descriptors containing immediata data or double-word pointers. Currently there is no problem since the only descriptors ran through this interface are the ones that (un)instantiate RNG. Signed-off-by: Horia Geant? <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> |
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| .. | ||
| caamalg.c | ||
| caamhash.c | ||
| caamrng.c | ||
| compat.h | ||
| ctrl.c | ||
| ctrl.h | ||
| desc.h | ||
| desc_constr.h | ||
| error.c | ||
| error.h | ||
| intern.h | ||
| jr.c | ||
| jr.h | ||
| Kconfig | ||
| key_gen.c | ||
| key_gen.h | ||
| Makefile | ||
| pdb.h | ||
| regs.h | ||
| sg_sw_sec4.h | ||