James Zhu d0e62855fa drm/amdgpu: add uvd enc registers in header ... Add UVD encode write/read/size/base registers definition for uvd6.3 HEVC ecoding Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-and-Tested-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2017-10-06 17:43:53 -04:00
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bif
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raven1
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vega10