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The 64-bit case (both 64-bit and 32-bit frames) loads the new state from user memory. However, doing this is not desired if the FPU state is going to be restored on return to userland: it would be required to disable preemption in order to avoid a context switch which would set TIF_NEED_FPU_LOAD. If this happens before the restore operation then the loaded registers would become volatile. Furthermore, disabling preemption while accessing user memory requires to disable the pagefault handler. An error during FXRSTOR would then mean that either a page fault occurred (and it would have to be retried with enabled page fault handler) or a #GP occurred because the xstate is bogus (after all, the signal handler can modify it). In order to avoid that mess, copy the FPU state from userland, validate it and then load it. The copy_kernel_…() helpers are basically just like the old helpers except that they operate on kernel memory and the fault handler just sets the error value and the caller handles it. copy_user_to_fpregs_zeroing() and its helpers remain and will be used later for a fastpath optimisation. [ bp: Clarify commit message. ] Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Dave Hansen <dave.hansen@intel.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Cc: Andy Lutomirski <luto@kernel.org> Cc: Aubrey Li <aubrey.li@intel.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jann Horn <jannh@google.com> Cc: "Jason A. Donenfeld" <Jason@zx2c4.com> Cc: kvm ML <kvm@vger.kernel.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: Rik van Riel <riel@surriel.com> Cc: x86-ml <x86@kernel.org> Link: https://lkml.kernel.org/r/20190403164156.19645-22-bigeasy@linutronix.de
469 lines
12 KiB
C
469 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* FPU signal frame handling routines.
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*/
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#include <linux/compat.h>
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#include <linux/cpu.h>
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#include <asm/fpu/internal.h>
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#include <asm/fpu/signal.h>
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#include <asm/fpu/regset.h>
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#include <asm/fpu/xstate.h>
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#include <asm/sigframe.h>
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#include <asm/trace/fpu.h>
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static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32;
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/*
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* Check for the presence of extended state information in the
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* user fpstate pointer in the sigcontext.
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*/
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static inline int check_for_xstate(struct fxregs_state __user *buf,
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void __user *fpstate,
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struct _fpx_sw_bytes *fx_sw)
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{
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int min_xstate_size = sizeof(struct fxregs_state) +
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sizeof(struct xstate_header);
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unsigned int magic2;
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if (__copy_from_user(fx_sw, &buf->sw_reserved[0], sizeof(*fx_sw)))
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return -1;
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/* Check for the first magic field and other error scenarios. */
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if (fx_sw->magic1 != FP_XSTATE_MAGIC1 ||
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fx_sw->xstate_size < min_xstate_size ||
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fx_sw->xstate_size > fpu_user_xstate_size ||
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fx_sw->xstate_size > fx_sw->extended_size)
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return -1;
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/*
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* Check for the presence of second magic word at the end of memory
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* layout. This detects the case where the user just copied the legacy
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* fpstate layout with out copying the extended state information
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* in the memory layout.
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*/
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if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size))
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|| magic2 != FP_XSTATE_MAGIC2)
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return -1;
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return 0;
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}
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/*
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* Signal frame handlers.
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*/
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static inline int save_fsave_header(struct task_struct *tsk, void __user *buf)
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{
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if (use_fxsr()) {
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struct xregs_state *xsave = &tsk->thread.fpu.state.xsave;
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struct user_i387_ia32_struct env;
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struct _fpstate_32 __user *fp = buf;
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convert_from_fxsr(&env, tsk);
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if (__copy_to_user(buf, &env, sizeof(env)) ||
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__put_user(xsave->i387.swd, &fp->status) ||
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__put_user(X86_FXSR_MAGIC, &fp->magic))
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return -1;
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} else {
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struct fregs_state __user *fp = buf;
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u32 swd;
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if (__get_user(swd, &fp->swd) || __put_user(swd, &fp->status))
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return -1;
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}
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return 0;
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}
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static inline int save_xstate_epilog(void __user *buf, int ia32_frame)
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{
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struct xregs_state __user *x = buf;
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struct _fpx_sw_bytes *sw_bytes;
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u32 xfeatures;
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int err;
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/* Setup the bytes not touched by the [f]xsave and reserved for SW. */
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sw_bytes = ia32_frame ? &fx_sw_reserved_ia32 : &fx_sw_reserved;
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err = __copy_to_user(&x->i387.sw_reserved, sw_bytes, sizeof(*sw_bytes));
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if (!use_xsave())
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return err;
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err |= __put_user(FP_XSTATE_MAGIC2,
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(__u32 __user *)(buf + fpu_user_xstate_size));
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/*
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* Read the xfeatures which we copied (directly from the cpu or
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* from the state in task struct) to the user buffers.
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*/
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err |= __get_user(xfeatures, (__u32 __user *)&x->header.xfeatures);
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/*
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* For legacy compatible, we always set FP/SSE bits in the bit
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* vector while saving the state to the user context. This will
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* enable us capturing any changes(during sigreturn) to
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* the FP/SSE bits by the legacy applications which don't touch
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* xfeatures in the xsave header.
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*
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* xsave aware apps can change the xfeatures in the xsave
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* header as well as change any contents in the memory layout.
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* xrestore as part of sigreturn will capture all the changes.
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*/
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xfeatures |= XFEATURE_MASK_FPSSE;
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err |= __put_user(xfeatures, (__u32 __user *)&x->header.xfeatures);
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return err;
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}
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static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf)
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{
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int err;
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if (use_xsave())
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err = copy_xregs_to_user(buf);
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else if (use_fxsr())
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err = copy_fxregs_to_user((struct fxregs_state __user *) buf);
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else
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err = copy_fregs_to_user((struct fregs_state __user *) buf);
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if (unlikely(err) && __clear_user(buf, fpu_user_xstate_size))
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err = -EFAULT;
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return err;
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}
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/*
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* Save the fpu, extended register state to the user signal frame.
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*
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* 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save
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* state is copied.
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* 'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'.
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*
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* buf == buf_fx for 64-bit frames and 32-bit fsave frame.
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* buf != buf_fx for 32-bit frames with fxstate.
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*
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* Save the state to task's fpu->state and then copy it to the user frame
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* pointed to by the aligned pointer 'buf_fx'.
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*
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* If this is a 32-bit frame with fxstate, put a fsave header before
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* the aligned state at 'buf_fx'.
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*
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* For [f]xsave state, update the SW reserved fields in the [f]xsave frame
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* indicating the absence/presence of the extended state to the user.
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*/
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int copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size)
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{
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struct fpu *fpu = ¤t->thread.fpu;
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struct xregs_state *xsave = &fpu->state.xsave;
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struct task_struct *tsk = current;
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int ia32_fxstate = (buf != buf_fx);
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ia32_fxstate &= (IS_ENABLED(CONFIG_X86_32) ||
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IS_ENABLED(CONFIG_IA32_EMULATION));
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if (!access_ok(buf, size))
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return -EACCES;
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if (!static_cpu_has(X86_FEATURE_FPU))
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return fpregs_soft_get(current, NULL, 0,
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sizeof(struct user_i387_ia32_struct), NULL,
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(struct _fpstate_32 __user *) buf) ? -1 : 1;
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/*
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* If we do not need to load the FPU registers at return to userspace
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* then the CPU has the current state and we need to save it. Otherwise,
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* it has already been done and we can skip it.
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*/
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fpregs_lock();
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if (!test_thread_flag(TIF_NEED_FPU_LOAD)) {
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copy_fpregs_to_fpstate(fpu);
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set_thread_flag(TIF_NEED_FPU_LOAD);
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}
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fpregs_unlock();
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if (using_compacted_format()) {
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if (copy_xstate_to_user(buf_fx, xsave, 0, size))
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return -1;
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} else {
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fpstate_sanitize_xstate(fpu);
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if (__copy_to_user(buf_fx, xsave, fpu_user_xstate_size))
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return -1;
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}
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/* Save the fsave header for the 32-bit frames. */
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if ((ia32_fxstate || !use_fxsr()) && save_fsave_header(tsk, buf))
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return -1;
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if (use_fxsr() && save_xstate_epilog(buf_fx, ia32_fxstate))
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return -1;
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return 0;
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}
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static inline void
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sanitize_restored_xstate(union fpregs_state *state,
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struct user_i387_ia32_struct *ia32_env,
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u64 xfeatures, int fx_only)
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{
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struct xregs_state *xsave = &state->xsave;
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struct xstate_header *header = &xsave->header;
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if (use_xsave()) {
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/*
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* Note: we don't need to zero the reserved bits in the
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* xstate_header here because we either didn't copy them at all,
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* or we checked earlier that they aren't set.
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*/
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/*
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* Init the state that is not present in the memory
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* layout and not enabled by the OS.
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*/
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if (fx_only)
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header->xfeatures = XFEATURE_MASK_FPSSE;
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else
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header->xfeatures &= xfeatures;
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}
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if (use_fxsr()) {
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/*
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* mscsr reserved bits must be masked to zero for security
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* reasons.
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*/
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xsave->i387.mxcsr &= mxcsr_feature_mask;
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if (ia32_env)
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convert_to_fxsr(&state->fxsave, ia32_env);
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}
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}
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/*
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* Restore the extended state if present. Otherwise, restore the FP/SSE state.
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*/
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static inline int copy_user_to_fpregs_zeroing(void __user *buf, u64 xbv, int fx_only)
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{
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if (use_xsave()) {
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if ((unsigned long)buf % 64 || fx_only) {
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u64 init_bv = xfeatures_mask & ~XFEATURE_MASK_FPSSE;
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copy_kernel_to_xregs(&init_fpstate.xsave, init_bv);
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return copy_user_to_fxregs(buf);
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} else {
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u64 init_bv = xfeatures_mask & ~xbv;
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if (unlikely(init_bv))
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copy_kernel_to_xregs(&init_fpstate.xsave, init_bv);
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return copy_user_to_xregs(buf, xbv);
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}
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} else if (use_fxsr()) {
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return copy_user_to_fxregs(buf);
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} else
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return copy_user_to_fregs(buf);
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}
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static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size)
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{
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int ia32_fxstate = (buf != buf_fx);
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struct task_struct *tsk = current;
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struct fpu *fpu = &tsk->thread.fpu;
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int state_size = fpu_kernel_xstate_size;
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u64 xfeatures = 0;
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int fx_only = 0;
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ia32_fxstate &= (IS_ENABLED(CONFIG_X86_32) ||
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IS_ENABLED(CONFIG_IA32_EMULATION));
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if (!buf) {
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fpu__clear(fpu);
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return 0;
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}
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if (!access_ok(buf, size))
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return -EACCES;
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if (!static_cpu_has(X86_FEATURE_FPU))
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return fpregs_soft_set(current, NULL,
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0, sizeof(struct user_i387_ia32_struct),
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NULL, buf) != 0;
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if (use_xsave()) {
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struct _fpx_sw_bytes fx_sw_user;
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if (unlikely(check_for_xstate(buf_fx, buf_fx, &fx_sw_user))) {
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/*
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* Couldn't find the extended state information in the
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* memory layout. Restore just the FP/SSE and init all
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* the other extended state.
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*/
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state_size = sizeof(struct fxregs_state);
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fx_only = 1;
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trace_x86_fpu_xstate_check_failed(fpu);
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} else {
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state_size = fx_sw_user.xstate_size;
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xfeatures = fx_sw_user.xfeatures;
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}
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}
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if (ia32_fxstate) {
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/*
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* For 32-bit frames with fxstate, copy the user state to the
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* thread's fpu state, reconstruct fxstate from the fsave
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* header. Validate and sanitize the copied state.
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*/
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struct user_i387_ia32_struct env;
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union fpregs_state *state;
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int err = 0;
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void *tmp;
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tmp = kzalloc(sizeof(*state) + fpu_kernel_xstate_size + 64, GFP_KERNEL);
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if (!tmp)
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return -ENOMEM;
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state = PTR_ALIGN(tmp, 64);
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if (using_compacted_format()) {
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err = copy_user_to_xstate(&state->xsave, buf_fx);
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} else {
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err = __copy_from_user(&state->xsave, buf_fx, state_size);
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if (!err && state_size > offsetof(struct xregs_state, header))
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err = validate_xstate_header(&state->xsave.header);
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}
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if (err || __copy_from_user(&env, buf, sizeof(env))) {
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err = -1;
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} else {
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sanitize_restored_xstate(state, &env, xfeatures, fx_only);
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copy_kernel_to_fpregs(state);
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}
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kfree(tmp);
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return err;
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} else {
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union fpregs_state *state;
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void *tmp;
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int ret;
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tmp = kzalloc(sizeof(*state) + fpu_kernel_xstate_size + 64, GFP_KERNEL);
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if (!tmp)
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return -ENOMEM;
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state = PTR_ALIGN(tmp, 64);
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/*
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* For 64-bit frames and 32-bit fsave frames, restore the user
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* state to the registers directly (with exceptions handled).
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*/
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if ((unsigned long)buf_fx % 64)
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fx_only = 1;
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if (use_xsave() && !fx_only) {
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u64 init_bv = xfeatures_mask & ~xfeatures;
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if (using_compacted_format()) {
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ret = copy_user_to_xstate(&state->xsave, buf_fx);
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} else {
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ret = __copy_from_user(&state->xsave, buf_fx, state_size);
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if (!ret && state_size > offsetof(struct xregs_state, header))
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ret = validate_xstate_header(&state->xsave.header);
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}
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if (ret)
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goto err_out;
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sanitize_restored_xstate(state, NULL, xfeatures, fx_only);
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if (unlikely(init_bv))
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copy_kernel_to_xregs(&init_fpstate.xsave, init_bv);
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ret = copy_kernel_to_xregs_err(&state->xsave, xfeatures);
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} else if (use_fxsr()) {
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ret = __copy_from_user(&state->fxsave, buf_fx, state_size);
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if (ret)
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goto err_out;
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if (use_xsave()) {
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u64 init_bv = xfeatures_mask & ~XFEATURE_MASK_FPSSE;
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copy_kernel_to_xregs(&init_fpstate.xsave, init_bv);
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}
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state->fxsave.mxcsr &= mxcsr_feature_mask;
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ret = copy_kernel_to_fxregs_err(&state->fxsave);
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} else {
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ret = __copy_from_user(&state->fsave, buf_fx, state_size);
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if (ret)
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goto err_out;
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ret = copy_kernel_to_fregs_err(&state->fsave);
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}
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err_out:
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kfree(tmp);
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if (ret) {
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fpu__clear(fpu);
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return -1;
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}
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}
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return 0;
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}
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static inline int xstate_sigframe_size(void)
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{
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return use_xsave() ? fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE :
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fpu_user_xstate_size;
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}
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/*
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* Restore FPU state from a sigframe:
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*/
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int fpu__restore_sig(void __user *buf, int ia32_frame)
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{
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void __user *buf_fx = buf;
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int size = xstate_sigframe_size();
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if (ia32_frame && use_fxsr()) {
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buf_fx = buf + sizeof(struct fregs_state);
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size += sizeof(struct fregs_state);
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}
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return __fpu__restore_sig(buf, buf_fx, size);
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}
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unsigned long
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fpu__alloc_mathframe(unsigned long sp, int ia32_frame,
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unsigned long *buf_fx, unsigned long *size)
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{
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unsigned long frame_size = xstate_sigframe_size();
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*buf_fx = sp = round_down(sp - frame_size, 64);
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if (ia32_frame && use_fxsr()) {
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frame_size += sizeof(struct fregs_state);
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sp -= sizeof(struct fregs_state);
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}
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*size = frame_size;
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return sp;
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}
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/*
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* Prepare the SW reserved portion of the fxsave memory layout, indicating
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* the presence of the extended state information in the memory layout
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* pointed by the fpstate pointer in the sigcontext.
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* This will be saved when ever the FP and extended state context is
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* saved on the user stack during the signal handler delivery to the user.
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*/
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void fpu__init_prepare_fx_sw_frame(void)
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{
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int size = fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE;
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fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1;
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fx_sw_reserved.extended_size = size;
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fx_sw_reserved.xfeatures = xfeatures_mask;
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fx_sw_reserved.xstate_size = fpu_user_xstate_size;
|
|
|
|
if (IS_ENABLED(CONFIG_IA32_EMULATION) ||
|
|
IS_ENABLED(CONFIG_X86_32)) {
|
|
int fsave_header_size = sizeof(struct fregs_state);
|
|
|
|
fx_sw_reserved_ia32 = fx_sw_reserved;
|
|
fx_sw_reserved_ia32.extended_size = size + fsave_header_size;
|
|
}
|
|
}
|
|
|