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8cc1176e5d
This is in preparation for disabling L3 cache indices after having received correctable ECCs in the L3 cache. Now we allow for initial setting of a disabled index slot (write once) and deny writing new indices to it after it has been disabled. Also, we deny using both slots to disable one and the same index. Userspace can restore the previously disabled indices by rewriting those sysfs entries when booting. Cleanup and reorganize code while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> LKML-Reference: <20100602161840.GI18327@aftab> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> |
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| .. | ||
| cpufreq | ||
| mcheck | ||
| mtrr | ||
| .gitignore | ||
| addon_cpuid_features.c | ||
| amd.c | ||
| bugs.c | ||
| bugs_64.c | ||
| centaur.c | ||
| cmpxchg.c | ||
| common.c | ||
| cpu.h | ||
| cyrix.c | ||
| hypervisor.c | ||
| intel.c | ||
| intel_cacheinfo.c | ||
| Makefile | ||
| mkcapflags.pl | ||
| mshyperv.c | ||
| perf_event.c | ||
| perf_event_amd.c | ||
| perf_event_intel.c | ||
| perf_event_intel_ds.c | ||
| perf_event_intel_lbr.c | ||
| perf_event_p4.c | ||
| perf_event_p6.c | ||
| perfctr-watchdog.c | ||
| powerflags.c | ||
| proc.c | ||
| sched.c | ||
| transmeta.c | ||
| umc.c | ||
| vmware.c | ||