Alexander Duyck 7bd1759282 igb: Add support for DMA_ATTR_WEAK_ORDERING ... Since we are already using DMA attributes in igb for Rx there is no reason why we can't also apply DMA_ATTR_WEAK_ORDERING which is needed on some platforms to improve performance. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>		2017-03-17 12:11:43 -07:00
..
e1000_82575.c	igb: reset the PHY before reading the PHY ID	2017-01-06 02:18:51 -08:00
e1000_82575.h
e1000_defines.h
e1000_hw.h
e1000_i210.c	igb: Fix hw_dbg logging in igb_update_flash_i210	2017-01-06 02:23:22 -08:00
e1000_i210.h
e1000_mac.c	igb: Realign bad indentation	2017-01-06 02:18:49 -08:00
e1000_mac.h
e1000_mbx.c
e1000_mbx.h
e1000_nvm.c
e1000_nvm.h
e1000_phy.c	scripts/spelling.txt: add "overwritting" pattern and fix typo instances	2017-02-27 18:43:47 -08:00
e1000_phy.h
e1000_regs.h	igb: correct register comments	2017-01-06 02:18:50 -08:00
igb.h	igb: Add support for DMA_ATTR_WEAK_ORDERING	2017-03-17 12:11:43 -07:00
igb_ethtool.c
igb_hwmon.c
igb_main.c	igb: Add support for DMA_ATTR_WEAK_ORDERING	2017-03-17 12:11:43 -07:00
igb_ptp.c	clocksource: Use a plain u64 instead of cycle_t	2016-12-25 11:04:12 +01:00
Makefile