Roman Li c6888879fd drm/amd/display: Fix 6x4K displays light-up on Vega20 (v2) ... [Why] More than 4x4K didn't lightup on Vega20 due to low dcfclk value. Powerplay expects valid min requirement for dcfclk from DC. [How] Update min_dcfclock_khz based on min_engine_clock value. v2: backport to 4.20 (Alex) Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-11-29 14:36:03 -05:00
..
dce110_compressor.c	drm/amd/display: fix potential infinite loop in fbc path	2018-07-05 16:38:39 -05:00
dce110_compressor.h
dce110_hw_sequencer.c	drm/amd/display: Fix 6x4K displays light-up on Vega20 (v2)	2018-11-29 14:36:03 -05:00
dce110_hw_sequencer.h	drm/amd/display: Fix Vega10 lightup on S3 resume	2018-09-27 10:03:12 -05:00
dce110_mem_input_v.c	drm/amd/display: make function tables const	2018-07-10 14:17:11 -05:00
dce110_mem_input_v.h
dce110_opp_csc_v.c
dce110_opp_regamma_v.c
dce110_opp_v.c
dce110_opp_v.h
dce110_resource.c	drm/amdgpu/display/dce11: only enable FBC when selected	2018-11-06 16:46:12 -05:00
dce110_resource.h
dce110_timing_generator.c
dce110_timing_generator.h
dce110_timing_generator_v.c	drm/amd/display: remove dummy is_blanked() to optimise boot time	2018-05-15 13:43:07 -05:00
dce110_timing_generator_v.h
dce110_transform_v.c	drm/amd/display: add HDR visual confirm	2018-07-16 16:11:49 -05:00
dce110_transform_v.h
Makefile