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771153fc88
From very vague, ambiguous and incomplete information from Marvell we deduced that the 32-bit Aardvark register at address 0x4 (PCIE_CORE_CMD_STATUS_REG), which is not documented for Root Complex mode in the Functional Specification (only for Endpoint mode), controls two 16-bit PCIe registers: Command Register and Status Registers of PCIe Root Port. This means that bit 2 controls bus mastering and forwarding of memory and I/O requests in the upstream direction. According to PCI specifications bits [0:2] of Command Register, this should be by default disabled on reset. So explicitly disable these bits at early setup of the Aardvark driver. Remove code which unconditionally enables all 3 bits and let kernel code (via pci_set_master() function) to handle bus mastering of Root PCIe Bridge via emulated PCI_COMMAND on emulated bridge. Link: https://lore.kernel.org/r/20211028185659.20329-5-kabel@kernel.org Fixes: |
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| .. | ||
| controller | ||
| endpoint | ||
| hotplug | ||
| pcie | ||
| switch | ||
| access.c | ||
| ats.c | ||
| bus.c | ||
| ecam.c | ||
| host-bridge.c | ||
| iov.c | ||
| irq.c | ||
| Kconfig | ||
| Makefile | ||
| mmap.c | ||
| msi.c | ||
| of.c | ||
| p2pdma.c | ||
| pci-acpi.c | ||
| pci-bridge-emul.c | ||
| pci-bridge-emul.h | ||
| pci-driver.c | ||
| pci-label.c | ||
| pci-mid.c | ||
| pci-pf-stub.c | ||
| pci-stub.c | ||
| pci-sysfs.c | ||
| pci.c | ||
| pci.h | ||
| probe.c | ||
| proc.c | ||
| quirks.c | ||
| remove.c | ||
| rom.c | ||
| search.c | ||
| setup-bus.c | ||
| setup-irq.c | ||
| setup-res.c | ||
| slot.c | ||
| syscall.c | ||
| vc.c | ||
| vpd.c | ||
| xen-pcifront.c | ||