Rex Zhu 73b1917454 drm/amdgpu: Add CLK IP base offset ... so we can read/write the registers in CLK domain through RREG32/WREG32_SOC15 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-07-10 14:16:39 -05:00
..
acp	drm/amdgpu: Remove wrapper layer of cgs irq handling	2018-03-21 14:36:58 -05:00
amdgpu	drm/amdgpu: Add CLK IP base offset	2018-07-10 14:16:39 -05:00
amdkfd	Merge tag 'drm-amdkfd-next-2018-05-14' of git://people.freedesktop.org/~gabbayo/linux into drm-next	2018-05-15 16:06:08 +10:00
display	drm/amdgpu: allocate gart memory when it's required (v3)	2018-07-10 14:15:58 -05:00
include	drm/amd: Add sphinx documentation for amd_ip_funcs	2018-07-05 16:57:54 -05:00
lib
powerplay	drm/amd/pp: Remove the same struct define in powerplay	2018-07-05 16:40:02 -05:00