Ville Syrjälä 71849b67e7 Revert "drm/i915: Hack to tie both common lanes together on chv" ... With recent hardware/firmware there don't appear to be any glitches on the other PHY when we toggle the cmnreset for the other PHY. So detangle the cmnlane power wells from one another and let them be controlled independently. This reverts commit 3dd7b97458. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Deepak S <deepak.s@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2015-05-08 15:56:42 +02:00
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dvo.h
dvo_ch7xxx.c
dvo_ch7017.c
dvo_ivch.c
dvo_ns2501.c
dvo_sil164.c
dvo_tfp410.c
i915_cmd_parser.c
i915_debugfs.c	drm/i915: Move toggling planes out of crtc enable/disable.	2015-05-08 13:03:56 +02:00
i915_dma.c	drm/i915/skl: Add support to load SKL CSR firmware.	2015-05-08 13:03:10 +02:00
i915_drv.c	drm/i915/vlv: remove wait for previous GFX clk disable request	2015-05-08 13:12:48 +02:00
i915_drv.h	drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHV	2015-05-08 15:56:30 +02:00
i915_gem.c	drm/i915: Use partial view in mmap fault handler	2015-05-08 13:04:18 +02:00
i915_gem_batch_pool.c
i915_gem_batch_pool.h
i915_gem_context.c
i915_gem_debug.c
i915_gem_dmabuf.c
i915_gem_evict.c
i915_gem_execbuffer.c	drm/i915: Simplify cmd-parser DISPATCH_SECURE check	2015-05-08 13:03:09 +02:00
i915_gem_gtt.c	drm/i915: Add a partial GGTT view type	2015-05-08 13:04:18 +02:00
i915_gem_gtt.h	drm/i915: Add a partial GGTT view type	2015-05-08 13:04:18 +02:00
i915_gem_render_state.c
i915_gem_render_state.h
i915_gem_shrinker.c
i915_gem_stolen.c
i915_gem_tiling.c
i915_gem_userptr.c
i915_gpu_error.c	drm/i915: Free wa_batchbuffer when freeing error state	2015-05-08 13:03:37 +02:00
i915_ioc32.c
i915_irq.c
i915_params.c	drm/i915/skl: Add module parameter to select edp vswing table	2015-05-08 13:03:41 +02:00
i915_reg.h	drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHV	2015-05-08 15:56:30 +02:00
i915_suspend.c
i915_sysfs.c
i915_trace.h
i915_trace_points.c
i915_vgpu.c
i915_vgpu.h
intel_acpi.c
intel_atomic.c	drm/i915: Call drm helpers when duplicating crtc and plane states	2015-05-08 13:03:58 +02:00
intel_atomic_plane.c	drm/i915: Use atomic helpers for computing changed flags	2015-05-08 13:04:08 +02:00
intel_audio.c	drm/i915/audio: do not mess with audio registers if port is invalid	2015-05-08 13:03:36 +02:00
intel_bios.c	drm/i915/skl: Add module parameter to select edp vswing table	2015-05-08 13:03:41 +02:00
intel_bios.h
intel_crt.c
intel_csr.c	drm/i915/skl: Assert the requirements to enter or exit DC5.	2015-05-08 13:03:13 +02:00
intel_ddi.c	drm/i915/skl: Re-indent part of skl_ddi_calculate_wrpll()	2015-05-08 13:04:18 +02:00
intel_display.c	drm/i915: Set crtc_state->active to false when CRTC is disabled (v2)	2015-05-08 13:04:19 +02:00
intel_dp.c	drm/i915: Implement chv display PHY lane stagger setup	2015-05-08 15:55:22 +02:00
intel_dp_mst.c	drm/i915: Use for_each_connector_in_state helper macro	2015-05-08 13:03:58 +02:00
intel_drv.h	drm/i915: Remove save/restore logic from intel_crtc_set_config()	2015-05-08 13:04:07 +02:00
intel_dsi.c
intel_dsi.h
intel_dsi_panel_vbt.c
intel_dsi_pll.c
intel_dvo.c
intel_fbc.c	drm/i915: get rid of primary_enabled and use atomic state	2015-05-08 13:03:53 +02:00
intel_fbdev.c
intel_fifo_underrun.c
intel_frontbuffer.c
intel_hdmi.c	drm/i915: Implement chv display PHY lane stagger setup	2015-05-08 15:55:22 +02:00
intel_i2c.c
intel_lrc.c	drm/i915: checking IS_ERR() instead of NULL	2015-05-08 13:03:23 +02:00
intel_lrc.h
intel_lvds.c
intel_modes.c
intel_opregion.c
intel_overlay.c
intel_panel.c	drm/i915/bxt: BLC implementation	2015-05-08 13:03:38 +02:00
intel_pm.c	drm/i915/skl: Fix WaDisableChickenBitTSGBarrierAckForFFSliceCS	2015-05-08 13:03:44 +02:00
intel_psr.c
intel_renderstate.h
intel_renderstate_gen6.c
intel_renderstate_gen7.c
intel_renderstate_gen8.c
intel_renderstate_gen9.c
intel_ringbuffer.c	drm/i915/bxt: Mark WaCcsTlbPrefetchDisable as for Broxton also.	2015-05-08 13:04:16 +02:00
intel_ringbuffer.h
intel_runtime_pm.c	Revert "drm/i915: Hack to tie both common lanes together on chv"	2015-05-08 15:56:42 +02:00
intel_sdvo.c	drm/i915: Use POSTING_READ() in intel_sdvo_write_sdvox()	2015-05-08 13:03:39 +02:00
intel_sdvo_regs.h
intel_sideband.c
intel_sprite.c	drm/i915: Move intel_(pre_disable/post_enable)_primary to intel_display.c, and use it there.	2015-05-08 13:03:54 +02:00
intel_tv.c
intel_uncore.c
Kconfig
Makefile	drm/i915/skl: Add support to load SKL CSR firmware.	2015-05-08 13:03:10 +02:00