Chang S. Bae 70c3f1671b x86/fpu/xstate: Prepare XSAVE feature table for gaps in state component numbers ... The kernel checks at boot time which features are available by walking a XSAVE feature table which contains the CPUID feature bit numbers which need to be checked whether a feature is available on a CPU or not. So far the feature numbers have been linear, but AMX will create a gap which the current code cannot handle. Make the table entries explicitly indexed and adjust the loop code accordingly to prepare for that. No functional change. Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Len Brown <len.brown@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20211021225527.10184-20-chang.seok.bae@intel.com		2021-10-26 10:53:02 +02:00
..
bugs.c	x86/fpu: Replace the includes of fpu/internal.h	2021-10-20 15:27:29 +02:00
context.h	x86/fpu: Update XFD state where required	2021-10-26 10:53:02 +02:00
core.c	x86/fpu: Update XFD state where required	2021-10-26 10:53:02 +02:00
init.c	x86/fpu: Add fpu_state_config::legacy_features	2021-10-26 10:18:09 +02:00
internal.h	x86/fpu/signal: Prepare for variable sigframe length	2021-10-26 10:18:09 +02:00
legacy.h	x86/fpu: Move mxcsr related code to core	2021-10-20 15:27:28 +02:00
Makefile	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
regset.c	x86/fpu: Move xstate size to fpu_*_cfg	2021-10-21 19:38:55 +02:00
signal.c	x86/fpu: Update XFD state where required	2021-10-26 10:53:02 +02:00
xstate.c	x86/fpu/xstate: Prepare XSAVE feature table for gaps in state component numbers	2021-10-26 10:53:02 +02:00
xstate.h	x86/fpu: Update XFD state where required	2021-10-26 10:53:02 +02:00